LAN9500A-ABZJ - Hi-Speed USB 2.0 to 10/100 Ethernet Bridge | Microchip
Référence : LAN9500A-ABZJ ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $7.42 | $7,42 |
| 10 | $6.78 | $67,80 |
| 100 | $5.91 | $591,00 |
| 500 | $5.18 | $2 590,00 |
| 1 000 | $4.62 | $4 620,00 |
LAN9500A-ABZJ Présentation
An Ethernet bridge controller is a semiconductor device that translates between two dissimilar network or bus protocols, presenting one physical interface to the host system and another to the network. In this product's case, the bridge maps USB 2.0 bulk transfers to IEEE 802.3/802.3u Ethernet frames, allowing any embedded host with a USB port to add wired Ethernet without a native MAC. The bridge belongs to the broader hierarchy: USB-to-Ethernet bridge -> network interface controller -> Ethernet controller -> interface IC -> integrated circuit.
Key features include integrated HP Auto-MDIX for automatic cable polarity correction, auto-negotiation per IEEE 802.3u, flexible address filtering with a 48-bit perfect address, 64 hash-filtered multicast addresses, and a TAP controller for diagnostic packet capture. The on-chip PHY embeds ±8 kV HBM and ±15 kV air discharge ESD protection, which eliminates external TVS arrays on the magnetics lines and shrinks BOM cost in cost-sensitive designs.
The LAN9500A is built on a low-power CMOS process and operates from three internal rails (1.2 V, 2.5 V, 3.3 V) generated from a single 3.3 V supply. Reduced power operating modes plus an EEPROM-less design option help reduce overall system BOM and standby current. An external MII interface allows connection of an additional external PHY for dual-port or fiber applications, although most designs use the integrated PHY.
Typical applications include USB-to-Ethernet dongles, embedded Linux/Windows single-board computers, industrial controllers needing network connectivity, set-top boxes, printers with network ports, and USB port-replicators. The integrated PHY and USB PHY make it ideal where board area is constrained but full 10/100 throughput is required.
When designing with this device, ensure the 25 MHz crystal meets the datasheet's ±50 ppm tolerance and load capacitance specification. Use a 1 Mbit/s Ethernet magnetics module with a 1:1 turns ratio, and follow Microchip's reference schematic for the EXRES resistor value, which differs from the original LAN9500 part.
This page consolidates distributor pricing from DigiKey and Mouser, three verified same-brand drop-in alternatives from Microchip's LAN95xx family, and PCB design notes not present in the standalone datasheet PDF.
Alternatives de remplacement direct pour LAN9500A-ABZJ — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec LAN9500A-ABZJ (même facteur de forme et même empreinte) — différant par Address Filtering, Package, RoHS Status.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
LAN9500-ABZJ
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LAN9500I-ABZJ
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LAN9500AI-ABZJ
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LAN9500A-ABZJ-TR
✅ Remplacement direct✓ En stock
$2.75 / unité
Voir la fiche technique →LAN9730-ABZJ-TR
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
LAN9500A-ABZJ Spécifications
| Fonction | USB 2.0 to 10/100 Ethernet Bridge Controller |
| USB Standard | USB 2.0 Hi-Speed (480 Mbps) |
| Ethernet Standard | IEEE 802.3 / 802.3u, 10/100 Base-T/TX |
| Tension d'alimentation | 3.3 V (single external; on-chip 1.2 V and 2.5 V LDOs) |
| Température de fonctionnement | 0 C to +70 C (commercial) |
| Boîtier | 56-pin QFN (8x8 mm) |
| Type de montage | Surface Mount |
| Integrated PHY | 10/100 Ethernet PHY + USB 2.0 PHY on-chip |
| Auto-Negotiation | Yes (IEEE 802.3u) |
| Auto-MDIX | Yes (HP Auto-MDIX) |
| ESD Protection (HBM) | ±8 kV |
| ESD Protection (Air Discharge) | ±15 kV |
| External Crystal | 25 MHz |
| External MII Interface | Yes (for external PHY expansion) |
| Address Filtering | 48-bit perfect + 64 hash-filtered multicast |
| Statut RoHS | Compliant |
Configuration des broches de LAN9500A-ABZJ
| Broche 1 | VDD_CORE_1V2 — 1.2V core supply (decoupling only; internally regulated) |
| Broche 2 | VDD_PLL_1V2 — 1.2V PLL supply (decoupling only) |
| Broche 3 | VDD_2V5 — 2.5V analog supply (decoupling only) |
| Broche 4 | VDD_IO_3V3 — 3.3V I/O supply |
| Broche 5 | VDD_A_3V3 — 3.3V analog supply |
| Broche 6 | GND — Ground |
| Broche 7 | XTAL1 — 25 MHz crystal input |
| Broche 8 | XTAL2 — 25 MHz crystal output |
| Broche 9 | RESETn — Active-low reset input |
| Broche 10 | EXRES — External reference resistor (value per datasheet, e.g., 12.4 kohm) |
| Broche 11 | RBIAS — PHY bias resistor |
| Broche 12 | EECS — EEPROM chip select |
| Broche 13 | EECLK — EEPROM serial clock |
| Broche 14 | EEDO — EEPROM data out |
| Broche 15 | EEDI — EEPROM data in |
| Broche 16 | TXD0 — MII transmit data bit 0 |
| Broche 17 | TXD1 — MII transmit data bit 1 |
| Broche 18 | TXD2 — MII transmit data bit 2 |
| Broche 19 | TXD3 — MII transmit data bit 3 |
| Broche 20 | TX_EN — MII transmit enable |
| Broche 21 | TX_CLK — MII transmit clock |
| Broche 22 | TX_ER — MII transmit error |
| Broche 23 | COL — MII collision detect |
| Broche 24 | RXD0 — MII receive data bit 0 |
| Broche 25 | RXD1 — MII receive data bit 1 |
| Broche 26 | RXD2 — MII receive data bit 2 |
| Broche 27 | RXD3 — MII receive data bit 3 |
| Broche 28 | RX_DV — MII receive data valid |
| Broche 29 | RX_CLK — MII receive clock |
| Broche 30 | RX_ER — MII receive error |
| Broche 31 | CRS — MII carrier sense |
| Broche 32 | MDC — MII management data clock |
| Broche 33 | MDIO — MII management data I/O |
| Broche 34 | MII_MODE — MII mode select |
| Broche 35 | DP — USB 2.0 D+ differential line |
| Broche 36 | DM — USB 2.0 D- differential line |
| Broche 37 | VBUS — USB VBUS detect input |
| Broche 38 | TXN — Ethernet TX negative |
| Broche 39 | TXP — Ethernet TX positive |
| Broche 40 | RXN — Ethernet RX negative |
| Broche 41 | RXP — Ethernet RX positive |
| Broche 42 | LED0 — Activity/link LED driver 0 |
| Broche 43 | LED1 — Speed/activity LED driver 1 |
| Broche 44 | LED2 — Full-duplex LED driver 2 |
| Broche 45 | GPIO0 — General purpose I/O 0 |
| Broche 46 | GPIO1 — General purpose I/O 1 |
| Broche 47 | GPIO2 — General purpose I/O 2 |
| Broche 48 | GPIO3 — General purpose I/O 3 |
| Broche 49 | TEST — Factory test pin (tie low in production) |
| Broche 50 | NC — Not connected (per datasheet) |
| Broche 51 | NC — Not connected (per datasheet) |
| Broche 52 | GND — Ground (exposed pad primary thermal/ground) |
| Broche 53 | GND — Ground |
| Broche 54 | VDD_3V3 — 3.3V supply input |
| Broche 55 | VDD_3V3 — 3.3V supply input |
| Broche 56 | VDD_IO_3V3 — 3.3V I/O supply |
Applications typiques
LAN9500A-ABZJ convient pour 7 applications: USB-to-Ethernet Dongle, Embedded Single-Board Computer Networking, Network Printer Connectivity, USB Port Replicator / Docking Station, Industrial Controller Network Interface, Set-Top Box and Streaming Device Ethernet, USB-to-Ethernet Diagnostic Tool.
USB-to-Ethernet Dongle
The LAN9500A-ABZJ is purpose-built for compact USB-to-Ethernet dongles where board area is constrained and BOM cost is critical. Its integrated 10/100 PHY plus USB 2.0 Hi-Speed PHY eliminate the need for an external PHY or upstream MAC, reducing component count to a single IC plus magnetics, a 25 MHz crystal, and a few passives. The integrated HP Auto-MDIX removes the requirement for crossover cables, while ±8 kV HBM ESD on the Ethernet lines protects against real-world hot-plug events. Compared to discrete PHY + MAC designs, the LAN9500A reduces PCB footprint by roughly 60% and BOM cost by 30-40%.
Recommandé
Embedded Single-Board Computer Networking
Single-board computers (SBCs) running Linux or Windows often need wired Ethernet but lack a native MAC. The LAN9500A-ABZJ bridges the SBC's USB 2.0 host port to 10/100 Ethernet using only the standard Linux CDC-EEM or Linux-USBnet driver stack. The on-chip TAP controller allows packet capture for diagnostics without external logic analyzers. With commercial-grade 0 C to +70 C operation, it fits typical indoor SBC use cases including Raspberry Pi companion boards, kiosk controllers, and digital signage media players. Its multi-rail internal LDO design simplifies the upstream 5 V-to-3.3 V conversion.
Recommandé
Network Printer Connectivity
Office printers and multifunction devices require low-cost, reliable Ethernet for shared office networks. The LAN9500A-ABZJ's USB 2.0 Hi-Speed upstream connects to the printer's main controller SoC, while the integrated 10/100 PHY connects directly to the RJ45 jack through standard magnetics. Auto-negotiation ensures seamless integration with both 10 Mbps legacy hubs and modern gigabit switches (auto-negotiating down to 100 Mbps). The flexible address filtering with 48-bit perfect address plus 64 multicast hashes supports large office subnet designs without performance penalty.
Recommandé
USB Port Replicator / Docking Station
Laptop docking stations frequently include wired Ethernet as a primary port. The LAN9500A-ABZJ's small 56-pin QFN package plus USB 2.0 device interface fits easily into the docking station's space-constrained PCB, and the integrated ESD protection (±8 kV HBM, ±15 kV air discharge) eliminates the need for external TVS arrays on the Ethernet lines. The EEPROM-less operation mode reduces BOM and shortens manufacturing cycle time for high-volume docking station production.
Recommandé
Industrial Controller Network Interface
Programmable logic controllers (PLCs) and industrial HMIs benefit from the LAN9500A-ABZJ's USB-to-Ethernet bridging when the main controller lacks a built-in MAC. While the commercial-grade LAN9500A is rated 0 C to +70 C, the pin-compatible LAN9500I-ABZJ and LAN9500AI-ABZJ industrial variants extend operation to -40 C to +85 C for factory floor deployments. The auto-MDIX feature eliminates wiring errors during installation, and the integrated PHY's robust ESD protection survives typical industrial handling stresses.
Recommandé
Set-Top Box and Streaming Device Ethernet
Set-top boxes (STBs) and streaming media players often need wired Ethernet for reliable 4K video streaming where Wi-Fi is congested. The LAN9500A-ABZJ connects to the STB SoC's USB 2.0 host port and provides 10/100 Ethernet at wire-speed throughput, sufficient for full-bitrate video streams. Its low-power standby modes help meet Energy Star and European Ecodesign requirements for consumer AV equipment, and its compact QFN-56 (8x8 mm) package fits in the slim chassis of modern streaming devices.
Recommandé
USB-to-Ethernet Diagnostic Tool
Network engineers and field technicians use USB-to-Ethernet adapters as portable diagnostic tools for capturing traffic, testing cable runs, and isolating faults. The LAN9500A-ABZJ's integrated TAP controller enables hardware-level packet capture without external logic analyzers, while HP Auto-MDIX automatically detects cable polarity. The on-chip PHY's ESD protection (8 kV HBM) ensures the adapter survives field-service handling, and the commercial temperature range suits indoor and climate-controlled outdoor use. Diagnostic software suites (Wireshark, tcpdump) work out-of-the-box with the standard CDC-EEM driver.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour LAN9500A-ABZJ — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | LAN9500-ABZJ | LAN9500I-ABZJ | LAN9500AI-ABZJ | LAN9500A-ABZJ-TR | LAN9730-ABZJ-TR |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | QFN-56 (8x8 mm) | QFN-56 (8x8 mm) - same | QFN-56 (8x8 mm) - same | QFN-56 (8x8 mm) - same | QFN-56 (8x8 mm) - same | QFN-56 (8x8 mm) - same |
| USB Standard | USB 2.0 Hi-Speed (480 Mbps) | USB 2.0 Hi-Speed | USB 2.0 Hi-Speed | USB 2.0 Hi-Speed | USB 2.0 Hi-Speed | USB 2.0 Hi-Speed |
| Ethernet Speed | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps | 10/100 Mbps |
| Silicon Revision | A | Pre-A | Pre-A | A | A | LAN9730 |
| Operating Temperature | 0 C to +70 C (commercial) | 0 C to +70 C | -40 C to +85 C | -40 C to +85 C | 0 C to +70 C | 0 C to +70 C |
| Internal Supply Rails | 1.2 V + 2.5 V + 3.3 V (multi-rail) | 1.2 V + 2.5 V + 3.3 V | 1.2 V + 2.5 V + 3.3 V | 1.2 V + 2.5 V + 3.3 V | 1.2 V + 2.5 V + 3.3 V | Single 3.3 V rail |
| RoHS Compliance | Yes | Yes | Yes | Yes | Yes | Yes |
Principaux différenciateurs
- Silicon A revision with updated internal design (vs LAN9500-ABZJ)
- Industrial temperature option in same package (vs LAN9500I-ABZJ)
- Combined A silicon + industrial temperature in one part (vs LAN9500AI-ABZJ)
- Integrated multi-rail LDOs versus single rail (vs LAN9730-ABZJ-TR)
Notes de conception
Follow the Microchip LAN950x reference schematic exactly for the EXRES external resistor (typically 12.4 kohm 1%) and the RBIAS bias resistor (typically 12.4 kohm 1%). Incorrect values will cause the integrated PHY to fail link negotiation or fail USB 2.0 Hi-Speed eye compliance. The 25 MHz crystal must meet ±50 ppm initial accuracy and ±50 ppm load capacitance tolerance per the datasheet crystal specification table. Place the crystal within 5 mm of the XTAL1/XTAL2 pins with a guard ring of ground vias to reduce EMI.
Route the USB 2.0 D+/D- differential pair as a 90-ohm differential impedance with maximum length matching of 150 mil. The 10/100 Ethernet MDI± pairs should also be 100-ohm differential, with the magnetics module placed within 25 mm of the RJ45 jack. The exposed thermal pad (EPAD) of the QFN-56 package must be soldered to a continuous ground plane with at least 9 thermal vias (0.3 mm drill, 0.6 mm pitch) for proper heat dissipation and electrical ground return. Reference Microchip LAN950x reference design for the EPAD via pattern.
Estimated: When migrating from LAN9500-ABZJ to LAN9500A-ABZJ, designers must update the EXRES resistor and several decoupling capacitor values per the LAN950x datasheet. Common pitfalls include: (1) omitting the 2.5V decoupling cap on VDD_2V5, causing USB compliance failures; (2) using incorrect EXRES value, causing 10/100 link failures; (3) missing the RBIAS resistor entirely, causing the PHY to malfunction; (4) routing D+/D- over a power plane split, causing USB signal integrity failures. Always validate against the latest Microchip reference schematic.
The LAN9500A-ABZJ in the QFN-56 (8x8 mm) package has a theta_JA of approximately 35 C/W when the EPAD is soldered to a standard 2 oz copper 4-layer PCB. At full USB 2.0 Hi-Speed throughput with 100 Mbps Ethernet traffic, the device typically dissipates around 0.4-0.5 W, resulting in a junction temperature rise of ~15-20 C above ambient. This is well within the commercial 0 C to +70 C operating range for most indoor applications without explicit heatsinking, but designers should still maintain the EPAD solder connection for thermal and electrical reasons.
Informations de conformité
RoHS and REACH compliant per Microchip product page. Not AEC-Q100 qualified - this is a commercial-grade IC. Industrial-temp variants (LAN9500I, LAN9500AI) are not automotive-qualified either. For automotive applications, an AEC-Q100 part would need separate qualification.