PIC24FJ128DA110-I/PT - 16-bit MCU, 128KB Flash, USB OTG, Graphics | Microchip
Référence : PIC24FJ128DA110-I/PT ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $6.95 | $6,95 |
| 10 | $6.28 | $62,80 |
| 100 | $5.62 | $562,00 |
| 500 | $4.98 | $2 490,00 |
| 1 000 | $4.41 | $4 410,00 |
PIC24FJ128DA110-I/PT Présentation
An LDO (Low-Dropout) linear regulator is a type of voltage regulator that maintains a stable output voltage even when the input voltage is very close to the output voltage; conversely, the PIC24FJ128DA110-I/PT sits within the broader taxonomy of MCU (microcontroller unit) -> embedded microcontroller -> 16-bit RISC MCU -> PIC24F family -> semiconductor. Understanding this hierarchy clarifies where this device competes: against other 16-bit low-power MCUs and against higher-end Cortex-M0+ parts for cost-sensitive graphical HMI designs.
Key features include a dedicated graphics controller with hardware-accelerated rendering for line, rectangle, and text drawing, USB On-The-Go (host + device role) with integrated PHY, a 10-bit ADC at 500 ksps, multiple UART/SPI/I2C peripherals, a Parallel Master Port (PMP) for external graphics memory or bus interfaces, and Microchip's eXtreme Low Power (XLP) technology with multiple sleep modes down to nanoWatt levels. The integrated Charge Time Measurement Unit (CTMU) supports capacitive touch sensing without external ICs.
Architecturally, the device pairs a 16-bit modified Harvard RISC core with a 24-bit instruction word and 16-bit data path, plus a dedicated graphics DMA engine that offloads pixel rendering from the CPU. The 32 MHz oscillator with PLL yields 16 MIPS throughput, more than sufficient for mid-resolution WQVGA UI animation. Internal voltage regulation supports 2.0V to 3.6V single-supply operation.
Typical applications include graphical user-interface panels, USB-connected human-interface devices, low-cost HMI touch screens with display up to 4.3-inch WQVGA, embedded data loggers with USB mass storage, and portable medical or industrial instruments requiring a monochrome or color TFT panel. The integrated graphics controller and CTMU allow a two-IC BOM (MCU + display) for many designs.
When designing with this part, evaluate whether your display resolution stays at or below 480x272; larger WVGA panels require the PIC24FJ256DA110 family or higher. Plan PCB layout for the USB OTG D+/D- 90-ohm differential pair and provide adequate decoupling (100 nF + bulk) on every VDD/VSS pin pair to keep the PLL clean.
This page synthesizes distributor pricing, pin-compatible alternatives in the 100-TQFP package, and practical design notes that complement the manufacturer datasheet with drop-in selection guidance.
Alternatives de remplacement direct pour PIC24FJ128DA110-I/PT — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC24FJ128DA110-I/PT (même facteur de forme et même empreinte) — différant par Package, Graphics Controller, Core Architecture, ADC, USB.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC24FJ256DA110-I/PT
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC24FJ128DA106-I/PT
✅ Remplacement direct✓ En stock
$5.07 / unité
Voir la fiche technique →PIC24FJ128DA110T-I/PT
✅ Remplacement direct✓ En stock
$4.79 / unité
Voir la fiche technique →PIC24FJ128DA110-I/BG
✅ Remplacement direct ⚠️ Spécifications non vérifiées✓ En stock
$5.25 / unité
Voir la fiche technique →PIC24FJ128DA110-I/PT Valeurs maximales et caractéristiques électriques
| Core Architecture | PIC24F (16-bit modified Harvard RISC) |
| Program Flash | 128 KB (43K x 24 instructions) |
| SRAM | 24 KB |
| Maximum CPU Speed | 32 MHz (16 MIPS) |
| Operating Voltage | 2.0 V to 3.6 V |
| USB | USB 2.0 On-The-Go (Host + Device) with integrated PHY |
| Graphics Controller | Integrated; drives up to 4.3" WQVGA (480x272) |
| CTMU (Capacitive Touch) | Yes (Charge Time Measurement Unit) |
| Communication | UART, SPI, I2C, PMP (Parallel Master Port) |
| Boîtier | 100-pin TQFP (PT), 12x12 mm |
| Type de montage | Surface Mount |
| Température de fonctionnement | -40C to +85C (Industrial, -I suffix) |
| Niveau MSL | 3 (168 hours) |
| Statut RoHS | Compliant |
| Lead-Free | Yes |
Configuration des broches de PIC24FJ128DA110-I/PT
| Broche 1 | RP15/RD15 — Remappable I/O / data bus D15 |
| Broche 2 | RP14/RD14 — Remappable I/O / data bus D14 |
| Broche 3 | RP13/RD13 — Remappable I/O / data bus D13 |
| Broche 4 | RP12/RD12 — Remappable I/O / data bus D12 |
| Broche 5 | RP11/RD11 — Remappable I/O / data bus D11 |
| Broche 6 | RP10/RD10 — Remappable I/O / data bus D10 |
| Broche 7 | RP9/RD9 — Remappable I/O / data bus D9 |
| Broche 8 | RP8/RD8 — Remappable I/O / data bus D8 |
| Broche 9 | VSS — Ground reference |
| Broche 10 | VDD — Positive supply (2.0V to 3.6V) |
| Broche 11 | RP7/RD7 — Remappable I/O / data bus D7 |
| Broche 12 | RP6/RD6 — Remappable I/O / data bus D6 |
| Broche 13 | RP5/RD5 — Remappable I/O / data bus D5 |
| Broche 14 | RP4/RD4 — Remappable I/O / data bus D4 |
| Broche 15 | RP2/RD9 — Remappable I/O / data bus D3 |
| Broche 16 | RP1/RD1 — Remappable I/O / data bus D1 |
| Broche 17 | RP0/RD0 — Remappable I/O / data bus D0 |
| Broche 18 | PGED2/RG14 — Programming data / I/O |
| Broche 19 | PGEC2/RG12 — Programming clock / I/O |
| Broche 20 | RG13 — General I/O |
| Broche 21 | RG15 — General I/O |
| Broche 22 | RF13 — General I/O |
| Broche 23 | RF12 — General I/O |
| Broche 24 | PMD15/RF8 — PMP data / general I/O |
| Broche 25 | PMD14/RF7 — PMP data / general I/O |
| Broche 26 | PMD13/RF6 — PMP data / general I/O |
| Broche 27 | PMD12/RF5 — PMP data / general I/O |
| Broche 28 | PMD11/RF4 — PMP data / general I/O |
| Broche 29 | PMD10/RF3 — PMP data / general I/O |
| Broche 30 | PMD9/RF2 — PMP data / general I/O |
| Broche 31 | PMD8/RF1 — PMP data / general I/O |
| Broche 32 | PMD7/RE9 — PMP data / general I/O |
| Broche 33 | PMD6/RE8 — PMP data / general I/O |
| Broche 34 | PMD5/RE7 — PMP data / general I/O |
| Broche 35 | PMD4/RE6 — PMP data / general I/O |
| Broche 36 | PMD3/RE5 — PMP data / general I/O |
| Broche 37 | PMD2/RE4 — PMP data / general I/O |
| Broche 38 | PMD1/RE3 — PMP data / general I/O |
| Broche 39 | PMD0/RE2 — PMP data / general I/O |
| Broche 40 | PMCS1/RE1 — PMP chip select / I/O |
| Broche 41 | PMCS2/RE0 — PMP chip select / I/O |
| Broche 42 | PMRD/RF0 — PMP read strobe / I/O |
| Broche 43 | PMWR/RF13 — PMP write strobe / I/O |
| Broche 44 | PMA0/RB0 — PMP address / I/O |
| Broche 45 | PMA1/RB1 — PMP address / I/O |
| Broche 46 | PMA2/RB2 — PMP address / I/O |
| Broche 47 | PMA3/RB3 — PMP address / I/O |
| Broche 48 | PMA4/RB4 — PMP address / I/O |
| Broche 49 | PMA5/RB5 — PMP address / I/O |
| Broche 50 | PMA6/RB6 — PMP address / I/O |
| Broche 51 | PMA7/RB7 — PMP address / I/O |
| Broche 52 | PMA8/RB8 — PMP address / I/O |
| Broche 53 | PMA9/RB9 — PMP address / I/O |
| Broche 54 | PMA10/RB10 — PMP address / I/O |
| Broche 55 | PMA11/RB11 — PMP address / I/O |
| Broche 56 | PMA12/RB12 — PMP address / I/O |
| Broche 57 | PMA13/RB13 — PMP address / I/O |
| Broche 58 | PMA14/RB14 — PMP address / I/O |
| Broche 59 | PMA15/RB15 — PMP address / I/O |
| Broche 60 | VSS — Ground reference |
| Broche 61 | VDD — Positive supply (2.0V to 3.6V) |
| Broche 62 | OSC1/RA0 — Oscillator input / I/O |
| Broche 63 | OSC2/RA1 — Oscillator output / I/O |
| Broche 64 | RA2 — General I/O |
| Broche 65 | RA3 — General I/O |
| Broche 66 | RA4 — General I/O |
| Broche 67 | RA5 — General I/O |
| Broche 68 | RA6 — General I/O |
| Broche 69 | RA7 — General I/O |
| Broche 70 | RA9 — General I/O |
| Broche 71 | RA10 — General I/O |
| Broche 72 | RA11 — General I/O |
| Broche 73 | RA12 — General I/O |
| Broche 74 | RA14 — General I/O |
| Broche 75 | RA15 — General I/O |
| Broche 76 | VSS — Ground reference |
| Broche 77 | VDD — Positive supply (2.0V to 3.6V) |
| Broche 78 | D-/RG3 — USB OTG D- / I/O |
| Broche 79 | D+/RG2 — USB OTG D+ / I/O |
| Broche 80 | VBUS/RG1 — USB VBUS detect / I/O |
| Broche 81 | VUSB3V3/RG0 — USB internal 3.3V rail / I/O |
| Broche 82 | RC1 — General I/O |
| Broche 83 | RC2 — General I/O |
| Broche 84 | RC3 — General I/O |
| Broche 85 | RC4 — General I/O |
| Broche 86 | RD0 — General I/O |
| Broche 87 | RD1 — General I/O |
| Broche 88 | RD2 — General I/O |
| Broche 89 | RD3 — General I/O |
| Broche 90 | RD4 — General I/O |
| Broche 91 | RD5 — General I/O |
| Broche 92 | RD7 — General I/O |
| Broche 93 | RC12 — General I/O |
| Broche 94 | RC13 — General I/O |
| Broche 95 | RC14 — General I/O |
| Broche 96 | RC15 — General I/O |
| Broche 97 | RG6 — General I/O |
| Broche 98 | RG7 — General I/O |
| Broche 99 | RG8 — General I/O |
| Broche 100 | RG9 — General I/O |
Applications typiques
PIC24FJ128DA110-I/PT convient pour 6 applications: Graphical HMI with 4.3" WQVGA TFT, USB OTG Peripheral / Embedded Host, Industrial Control Panel with Touch, Portable Medical Instrument Display, Smart Home Control Panel, Embedded Data Logger with USB Mass Storage.
Graphical HMI with 4.3" WQVGA TFT
The PIC24FJ128DA110-I/PT's integrated graphics controller and 128 KB Flash make it a natural fit for driving 4.3-inch WQVGA (480x272) TFT panels. With hardware acceleration for line, rectangle, text, and bit-block transfers, the CPU is freed for application logic rather than pixel pumping. The CTMU enables capacitive touch scanning directly from the chip without a dedicated touch controller. Place the MCU close to the display data bus to minimize skew, and route PMP lines with matched impedance to keep the WQVGA frame rate above 30 fps without bus contention.
Recommandé
USB OTG Peripheral / Embedded Host
With integrated USB 2.0 On-The-Go (host + device) and on-chip PHY, the PIC24FJ128DA110-I/PT eliminates the need for an external PHY in USB-class designs. It supports HID, CDC, MSD, and vendor-class stacks from Microchip's MLA library. Application examples include USB mass-storage data loggers, USB keyboard/mouse embedded hosts, and CDC virtual COM ports. Route the D+/D- lines as a 90-ohm differential pair with no stubs, place a common-mode choke near the connector, and add a TVS protection array to meet ESD/EMI requirements.
Recommandé
Industrial Control Panel with Touch
The PIC24FJ128DA110-I/PT's CTMU peripheral enables capacitive touch sensing on a row/column matrix, supporting industrial control panels with up to 16-32 buttons without an external touch IC. The -40C to +85C industrial temperature range suits factory-floor environments. The device's nanoWatt XLP sleep modes keep idle power under 1 uA, supporting mains-powered and battery-backed installations. Combine with a 4.3-inch WQVGA panel for a full graphical industrial HMI.
Recommandé
Portable Medical Instrument Display
The PIC24FJ128DA110-I/PT is well-suited to portable medical instruments that require a small color TFT, USB data export, and capacitive touch for user input. The integrated graphics controller removes the BOM cost of a separate display driver, and the USB OTG port supports both charging and CDC/MSD data transfer to a host PC. Low-power XLP sleep modes extend battery life between measurement cycles. Designers should validate EMC per IEC 60601-1 and use a TVS-protected USB connector for patient-connected devices.
Recommandé
Smart Home Control Panel
For wall-mounted smart home control panels, the PIC24FJ128DA110-I/PT integrates a TFT driver, capacitive touch via CTMU, and USB for firmware update or commissioning. It pairs well with Wi-Fi co-processors over UART or SPI to offload radio duties. The 16 MIPS throughput drives 480x272 panels at 30+ fps while leaving CPU headroom for Zigbee or Matter stack bridges. The 100-pin TQFP gives ample GPIO for keypad backlight, status LEDs, and buzzer control on a single PCB.
Recommandé
Embedded Data Logger with USB Mass Storage
The PIC24FJ128DA110-I/PT's USB OTG device mode supports Mass Storage Class (MSC) on external SD cards or SPI Flash, enabling data loggers that appear as removable drives when plugged into a PC. The 128 KB Flash can host filesystem stacks plus the application, while 24 KB SRAM buffers write bursts. The CTMU and 10-bit ADC support sensor front-ends. Designers should wear-level the Flash via application-managed mapping and add a Schottky-protected USB VBUS path.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC24FJ128DA110-I/PT — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC24FJ256DA110-I/PT | PIC24FJ128DA106-I/PT | PIC24FJ128DA110T-I/PT | PIC24FJ128DA110-I/BG |
|---|---|---|---|---|---|
| Package | TQFP-100 (PT, 12x12 mm) | TQFP-100 (PT, 12x12 mm) - same | TQFP-100 (PT, 12x12 mm) - same | TQFP-100 (PT, 12x12 mm) - same | TQFP-100 (PT equivalent BG package) - same footprint family |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Program Flash | 128 KB | 256 KB | 128 KB | 128 KB | 128 KB |
| SRAM | 24 KB | 32 KB | 24 KB | 24 KB | 24 KB |
| Maximum CPU Speed | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) |
| Graphics Controller | Yes (up to 480x272 WQVGA) | Yes | Yes | Yes | Yes |
| USB OTG | Yes (Host + Device, integrated PHY) | Yes | Yes | Yes | Yes |
| Operating Voltage | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
Principaux différenciateurs
- Integrated graphics controller in TQFP-100 footprint (vs PIC24FJ128GA010-I/PT)
- Doubled Flash for firmware growth headroom (vs PIC24FJ128DA110-I/PT (this part) vs PIC24FJ256DA110-I/PT)
- USB OTG with integrated PHY (vs PIC24FJ128DA106-I/PT)
Notes de conception
Route the USB OTG D+ and D- lines as a 90-ohm differential pair with no stubs, equal length matching within 150 mil, and a common-mode choke placed within 5 mm of the USB connector. Place the TVS protection array near the connector with a short ground return. Decouple every VDD/VSS pin pair with 100 nF ceramic plus a single bulk 4.7 uF or 10 uF tantalum. Keep the PLL crystal within 5 mm of the OSC1/OSC2 pins and guard the traces with a ground pour to suppress radiated emissions.
The integrated 1.8V core LDO derives from the 2.0V to 3.6V VDD rail; do not back-power VDD from the VUSB3V3 rail or vice versa. Brown-out reset thresholds are programmable; set BOR to the application minimum to maximize XLP nanoWatt savings. The device supports sleep currents under 1 uA in deep sleep with RTCC running, which is ideal for battery-backed applications. Validate that any attached display controller does not source current back through logic pins when the MCU is in reset.
Place the MCU adjacent to the TFT panel connector with PMP data lines (PMD0-PMD15), address lines (PMA0-PMA15), and strobes (PMRD/PMWR) of equal length. Group parallel data lines into a bus with ground traces between byte groups. The graphics controller can stall the PMP bus; reserve PMA15 and one PMCS line for self-refresh control to keep frame tearing off the screen. Keep CTMU touch traces short and shielded, and route them away from the USB differential pair.
Informations de conformité
RoHS and REACH compliance per Microchip product page. The -I/PT industrial temperature variant is not AEC-Q100 qualified; automotive designers should select the PIC24FJ128DA110-E/PT extended variant or consult Microchip automotive part numbering.
