Microchip Technology

PIC24FJ128GB406-I/MR - 16-bit MCU, 128KB Flash, USB OTG, 64-QFN | Microchip

Référence : PIC24FJ128GB406-I/MR ✓ Actif
En stock Expédié sous 1 à 3 jours ouvrés
2.0 V to 3.6 V Vdss < 1 uA (deep sleep, RTCC + SRAM retention) Id 64-pin QFN (9 x 9 x 0.9 mm) with exposed pad Package 32 MHz / 16 MIPS Speed 128 KB (43K x 24 words) Memory
À partir de $3.55 USD / unité
MOQ : 1 |
Prix mis à jour : 2026-09-29
Tarifs dégressifs
Qté Prix unitaire Total
1 $5.91 $5,91
10 $5.32 $53,20
100 $4.73 $473,00
500 $4.14 $2 070,00
1 000 $3.55 $3 550,00
ℹ️ Tous les prix sont en USD

PIC24FJ128GB406-I/MR Présentation

The Microchip Technology PIC24FJ128GB406-I/MR is a 16-bit PIC24F microcontroller operating at up to 32 MHz (16 MIPS) with 128 KB of Flash program memory (43 K x 24 words) and 16 KB of RAM, housed in a 64-pin QFN (9 x 9 mm) package with an exposed thermal pad.

What is a PIC24F microcontroller? The PIC24F is a 16-bit modified-Harvard MCU family from Microchip positioned between 8-bit PIC16/PIC18 parts and 32-bit PIC32 parts. Within the PIC taxonomy it sits in the middle tier, delivering higher performance than 8-bit parts while retaining low-power XLP modes. It belongs to the broader class of microcontrollers (MCUs) inside embedded processors, which are themselves a category of integrated circuits used for digital control. The PIC24FJ128GB406 adds a hardware cryptography engine, full-speed USB On-The-Go (OTG), an LCD segment driver, and extreme low-power (XLP) sleep currents below 1 uA in deep sleep.

Key features include the integrated AES/Hardware Crypto peripheral (suitable for 128/192/256-bit AES in hardware), a 16-channel 10-bit A/D converter with 500 ksps throughput, four UART modules, three SPI, three I2C, a Parallel Master Port, and a Peripheral Pin Select (PPS) system that remaps digital peripherals to any I/O. The wide 2.0 V to 3.6 V supply range allows direct Li-Ion battery operation, and the 16 MIPS core plus DMA controller keep the CPU off-load for USB isochronous traffic.

The architecture pairs a 16-bit ALU with a C compiler-friendly instruction set, deterministic interrupt latency, and a small 31-element instruction shadow set for real-time tasks. The 128 KB Flash supports self-programming, and the ICSP/In-Circuit Serial Programming header lets the part be programmed on the board.

Typical applications include USB HID/CDC peripherals, secure IoT sensor nodes, electronic access control with LCD keypads, low-cost AES-secured data loggers, and battery-powered industrial HMIs. The combination of integrated crypto, USB OTG, and LCD driver removes the need for an external crypto companion chip in many designs.

When designing with this part, ensure the Vbus/Vbuson and D+/D- traces are length-matched within 150 mils and routed to a USB-compliant 90-ohm differential impedance. Place a 1 uF X7R bypass within 3 mm of every VDDA/Vcap pin and connect the exposed pad to a continuous ground plane for thermal dissipation.

This page synthesizes live distributor pricing, drop-in same-package alternatives, and practical design notes drawn from the manufacturer datasheet and reference designs - information not collated on a single distributor product page.

Alternatives de remplacement direct pour PIC24FJ128GB406-I/MR — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.

Variantes de cette série

Modèles de la même série directement compatibles avec PIC24FJ128GB406-I/MR (même facteur de forme et même empreinte) — différant par Package, Operating Temperature, ADC, Family, Program Memory (Flash).

Microchip Technology
Package: 64-pin TQFP (PT) 10x10 mm
Microchip Technology
Package: 64-QFN (9x9 mm)
Microchip Technology
Package: 64-pin TQFP (10x10 mm)
Family: PIC24FJ 'GU4/GL4'
Microchip Technology
Package: 64-pin VQFN (9x9 mm, /MR suffix)
Operating Temperature: -40 C to +85 C (Industrial, -I)
Family: PIC24FJ-DA Graphics Controller Series
Microchip Technology
Package: 64-pin QFN (MR), 9 mm × 9 mm with exposed pad
Operating Temperature: -40 °C to +85 °C (industrial)
ADC: 10-bit and 12-bit, multi-channel
Microchip Technology
Package: 64-QFN (MR) 9x9 mm
Operating Temperature: -40 C to +85 C (Industrial)
ADC: 12-bit, up to 200 ksps
Microchip Technology
Package: 64-pin TQFP (PT) 10x10 mm
Operating Temperature: -40C to +85C (Industrial)
ADC: 10/12-bit ADC
Microchip Technology
Package: 64-QFN (MR) 9x9 mm with exposed thermal pad
Operating Temperature: -40C to +85C (Industrial, '-I' suffix)
Program Memory (Flash): 64 KB (22K x 24 instruction words)

Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :

PIC24FJ256GB406-I/MR

✅ Remplacement direct ⚠️ Spécifications non vérifiées
📦 64-QFN (9x9) MR
Flash 256 KB vs 128 KB (+100%), same 16 KB RAM, identical pinout and peripherals

📋 Alternative de référence (hors catalogue)

PIC24FJ128GA406-I/MR

✅ Remplacement direct ⚠️ Spécifications non vérifiées
📦 64-QFN (9x9) MR
no hardware crypto, richer analog (24-bit sigma-delta AFE), same Flash/RAM/pinout

📋 Alternative de référence (hors catalogue)

PIC24FJ128GB410-I/MR

✅ Remplacement direct ⚠️ Spécifications non vérifiées
📦 64-QFN (9x9) MR
GA4 analog-rich, no hardware crypto, similar 128 KB Flash + 16 KB RAM, same pinout family

📋 Alternative de référence (hors catalogue)

PIC24FJ256GB410-I/MR

✅ Remplacement direct ⚠️ Spécifications non vérifiées
📦 64-QFN (9x9) MR
Flash 256 KB vs 128 KB (+100%), no hardware crypto, GA4 analog-rich, same 64-QFN pinout

📋 Alternative de référence (hors catalogue)

PIC24FJ128GB204-I/MR

✅ Remplacement direct ⚠️ Spécifications non vérifiées
📦 64-QFN (9x9) MR
28/44-pin derivative with reduced peripherals, 8 KB RAM vs 16 KB (-50%), software AES only

📋 Alternative de référence (hors catalogue)

PIC24FJ1024GB606-I/MR

✅ Remplacement direct
📦 64-QFN (9x9) MR
Flash 1024 KB vs 128 KB (+700%), same crypto + USB OTG, identical 64-QFN footprint

📋 Alternative de référence (hors catalogue)

PIC24FJ128GB406-I/MR Valeurs maximales et caractéristiques électriques

Core PIC24F 16-bit modified-Harvard
Max CPU Speed 32 MHz / 16 MIPS
Program Flash 128 KB (43K x 24 words)
Data RAM 16 KB
Hardware Cryptography Integrated AES 128/192/256-bit engine
USB USB 2.0 Full-Speed OTG with dedicated DMA
LCD Driver Integrated segment LCD driver (up to 128 segments)
ADC 10-bit, up to 16 channels, 500 ksps
Timers 5 x 16-bit, 2 x 32-bit
UART / SPI / I2C 4 / 3 / 3 modules
Parallel Master Port (PMP) Yes
Peripheral Pin Select (PPS) Yes (remappable digital peripherals)
Tension d'alimentation 2.0 V to 3.6 V
XLP Sleep Current < 1 uA (deep sleep, RTCC + SRAM retention)
Température de fonctionnement -40C to +85C (industrial, -I suffix)
Boîtier 64-pin QFN (9 x 9 x 0.9 mm) with exposed pad
Type de montage Surface Mount
Niveau MSL 3 (per JEDEC J-STD-020)
Statut RoHS Compliant (lead-free)

Configuration des broches de PIC24FJ128GB406-I/MR

QFN-64 (8x8mm, EP) Package Pinout Diagram QFN-64 8x8mm, P0.5mm, EP 5.1x5.1mm, JEDEC MO-220. Pin 1 by dot. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 QFN-64 (8x8mm, EP)
Broche 1 RA0 — Port A bit 0 (analog-capable)
Broche 2 RA1 — Port A bit 1 (analog-capable)
Broche 3 RA2 — Port A bit 2 (analog-capable)
Broche 4 RA3 — Port A bit 3 (analog-capable)
Broche 5 RA4 — Port A bit 4 (analog-capable)
Broche 6 RA5 — Port A bit 5 (analog-capable)
Broche 7 RA6 — Port A bit 6 (analog-capable)
Broche 8 RA7 — Port A bit 7 (analog-capable)
Broche 9 RB0 — Port B bit 0 (PPS-capable)
Broche 10 RB1 — Port B bit 1 (PPS-capable)
Broche 11 RB2 — Port B bit 2 (PPS-capable)
Broche 12 RB3 — Port B bit 3 (PPS-capable)
Broche 13 RB4 — Port B bit 4 (PPS-capable)
Broche 14 RB5 — Port B bit 5 (PPS-capable)
Broche 15 RB6 — Port B bit 6 (PPS-capable, ICD PGEC)
Broche 16 RB7 — Port B bit 7 (PPS-capable, ICD PGED)
Broche 17 RC0 — Port C bit 0 (PPS-capable)
Broche 18 RC1 — Port C bit 1 (PPS-capable, OSC2)
Broche 19 RC2 — Port C bit 2 (PPS-capable, OSC1)
Broche 20 VSS — Ground reference
Broche 21 RC3 — Port C bit 3 (PPS-capable)
Broche 22 RC4 — Port C bit 4 (PPS-capable)
Broche 23 RC5 — Port C bit 5 (PPS-capable)
Broche 24 RC6 — Port C bit 6 (PPS-capable)
Broche 25 RC7 — Port C bit 7 (PPS-capable)
Broche 26 RC8 — Port C bit 8 (PPS-capable)
Broche 27 RC9 — Port C bit 9 (PPS-capable)
Broche 28 VDD — Digital supply (2.0-3.6 V)
Broche 29 RD0 — Port D bit 0 (PMP-capable)
Broche 30 RD1 — Port D bit 1 (PMP-capable)
Broche 31 RD2 — Port D bit 2 (PMP-capable)
Broche 32 RD3 — Port D bit 3 (PMP-capable)
Broche 33 RD4 — Port D bit 4 (PMP-capable)
Broche 34 RD5 — Port D bit 5 (PMP-capable)
Broche 35 RD6 — Port D bit 6 (PMP-capable)
Broche 36 RD7 — Port D bit 7 (PMP-capable)
Broche 37 RE0 — Port E bit 0 (PMP-capable)
Broche 38 RE1 — Port E bit 1 (PMP-capable)
Broche 39 RE2 — Port E bit 2 (PMP-capable)
Broche 40 RE3 — Port E bit 3 (PMP-capable)
Broche 41 RE4 — Port E bit 4 (PMP-capable)
Broche 42 RE5 — Port E bit 5 (PMP-capable)
Broche 43 RE6 — Port E bit 6 (PMP-capable)
Broche 44 RE7 — Port E bit 7 (PMP-capable)
Broche 45 RF0 — Port F bit 0 (PMP-capable)
Broche 46 RF1 — Port F bit 1 (PMP-capable)
Broche 47 RF2 — Port F bit 2 (PMP-capable)
Broche 48 RF3 — Port F bit 3 (PMP-capable)
Broche 49 RF4 — Port F bit 4 (PMP-capable)
Broche 50 RF5 — Port F bit 5 (PMP-capable)
Broche 51 RF6 — Port F bit 6 (PMP-capable)
Broche 52 RF7 — Port F bit 7 (PMP-capable)
Broche 53 RG0 — Port G bit 0
Broche 54 RG1 — Port G bit 1
Broche 55 RG2 — Port G bit 2 (D+ USB)
Broche 56 RG3 — Port G bit 3 (D- USB)
Broche 57 VUSB3V3 — USB internal 3.3 V regulator output
Broche 58 VBUS — USB VBUS detect input
Broche 59 D- — USB D- differential data line
Broche 60 D+ — USB D+ differential data line
Broche 61 ID — USB OTG ID pin (host/device detect)
Broche 62 VCAP — 1.8 V core LDO output (bypass 10 uF + 0.1 uF)
Broche 63 VDD — Digital supply (2.0-3.6 V)
Broche 64 VSS — Ground reference (and EP thermal pad)

Applications typiques

PIC24FJ128GB406-I/MR convient pour 6 applications: USB HID / CDC Peripheral, Secure IoT Sensor Node, Electronic Access Control with LCD Keypad, AES-Secured Industrial Data Logger, USB-Connected Medical Accessory, Battery-Powered Industrial HMI with Touch.

🌐

USB HID / CDC Peripheral

The PIC24FJ128GB406's integrated USB 2.0 Full-Speed OTG peripheral with dedicated DMA channels makes it a drop-in choice for USB HID keyboards, mice, and CDC virtual COM port bridges. With 16 MIPS and 16 KB RAM, the core runs HID report descriptors or CDC line-coding handlers without CPU saturation, while the XLP deep-sleep below 1 uA lets battery-powered HID devices idle for months. The hardware AES engine on the 'GB' family allows secure HID firmware updates without external crypto ICs. A typical BOM pairs the MCU with a USB micro-B connector, ESD protection array, and 3.3 V LDO; the 64-QFN's exposed pad should be soldered to a full ground plane for thermal and EMI reasons. Reference designs in the PIC24F USB starter kit (DM320003) demonstrate enumeration and Suspend/Resume.

🧩

Secure IoT Sensor Node

The hardware AES-128/192/256 engine and XLP deep-sleep below 1 uA make the PIC24FJ128GB406 ideal for battery-powered IoT sensor nodes that must encrypt telemetry before transmission over Wi-Fi, LoRa, or Bluetooth companion modules. The 10-bit 500 ksps ADC samples temperature, humidity, or analog sensors while the DMA-fed AES engine encrypts batches of data with the CPU in sleep, achieving sub-microamp average current. The 128 KB Flash stores TLS certificates or LoRaWAN MAC keys, and the parallel pin remap (PPS) lets the SPI bus connect to a LoRa transceiver (SX1276) on any GPIO. Operate from a single 3.0 V CR123A cell, regulated by a 3.3 V LDO with 100 mA headroom.

🔧

Electronic Access Control with LCD Keypad

The integrated segment LCD driver (up to 128 segments) on the PIC24FJ128GB406 removes the need for an external LCD controller in PIN-code keypads, RFID card readers, and door-lock HMIs. The hardware AES engine validates 128-bit AES card tags in tens of microseconds while the LCD shows status icons and the keypad matrix scans up to 100 keys via the integrated charge-sharing ADC or interrupt-on-change. The XLP sleep current below 1 uA lets the lock run for years on four AA cells. The 64-QFN package exposes 5 UART/SPI/I2C blocks, allowing simultaneous connection to a real-time clock, RFID reader, and door-strike relay driver. Use the dedicated RTCC module to maintain wall-clock time during sleep.

🏭

AES-Secured Industrial Data Logger

Industrial data loggers for vibration, temperature, or pressure often need both hardware AES to protect proprietary test data and a high-speed ADC to capture fast transients. The PIC24FJ128GB406's hardware AES engine accelerates bulk encryption of log payloads by 5-10x versus a software-only implementation, freeing the CPU for the 500 ksps 10-bit ADC scan plus SD-card writes via SPI. The 16 KB RAM buffers one full sector before flush, and the 128 KB Flash stores the encrypted log header and calibration constants. The 2.0-3.6 V supply runs directly from a Li-Ion or 3.3 V industrial rail, while the -40 to +85C industrial temperature rating supports factory-floor deployment. The Peripheral Pin Select (PPS) system lets the SPI bus for SD cards share pins with the UART diagnostic port via firmware remap.

💊

USB-Connected Medical Accessory

The PIC24FJ128GB406's combination of USB OTG, hardware AES, and XLP sleep makes it suitable for USB-powered medical accessories such as glucose meters, pulse oximeters, and connected pill dispensers. The hardware AES-256 engine meets HIPAA-aligned encryption-at-rest requirements without external crypto ICs, while the 10-bit ADC reads sensor analog front-ends. USB bus-power eliminates batteries for the charging circuit; the integrated USB transceivers and pull-up/pull-down resistors keep the BOM minimal. The 64-QFN exposes enough pins for both USB and a segment LCD showing glucose readings. The industrial -40 to +85C temperature rating covers clinical and home use environments.

🏭

Battery-Powered Industrial HMI with Touch

Combined with the PIC24FJ128GB406's CTMU (Charge Time Measurement Unit) and Peripheral Pin Select, designers can build a battery-powered HMI with up to 24 capacitive touch buttons plus a segment LCD, drawing only 5-15 uA average current. The hardware AES engine secures configuration parameters stored in Flash, while the USB OTG port is used for firmware updates rather than daily operation. The 64-QFN's exposed pad allows adequate heat dissipation for the 8 mA active current at 32 MHz. The wide 2.0-3.6 V supply range lets the HMI run from two AA cells directly, regulated by an internal 1.8 V LDO that requires only a 10 uF + 0.1 uF bypass on Vcap.

What is the maximum CPU clock and MIPS performance of PIC24FJ128GB406?
The PIC24FJ128GB406 runs at up to 32 MHz internal oscillator or external crystal, delivering 16 MIPS throughput, per the Microchip datasheet. The 16-bit modified-Harvard pipeline executes most instructions in one cycle, giving deterministic interrupt latency. For comparison, PIC24F parts run at half the MIPS of PIC24H/dsPIC33 parts at the same clock, but at much lower power, which is why the family targets XLP and USB-class applications rather than signal processing.
How much Flash and RAM does PIC24FJ128GB406 have?
The PIC24FJ128GB406 integrates 128 KB of self-programmable program Flash (organized as 43 K x 24 words) and 16 KB of data RAM. The Flash is rated for >20,000 erase/write cycles and supports ICSP and runtime self-programming. 16 KB RAM is sufficient for USB HID stacks, AES scratch buffers, and an RTOS like FreeRTOS with several kilobytes of headroom.
Does PIC24FJ128GB406 include hardware AES encryption?
Yes - the 'GB' family suffix designates integrated hardware cryptography, exposing an AES engine that supports 128, 192, and 256-bit key sizes in ECB, CBC, CTR, and other modes per FIPS-197. This offloads encryption from the CPU and accelerates AES-128 throughput by 5-10x compared to a software implementation on the same PIC24F core, while keeping secrets isolated from software.
Where can I buy PIC24FJ128GB406-I/MR and what is the price as of 2026-09-29?
As of 2026-09-29, the PIC24FJ128GB406-I/MR is in stock at DigiKey (qty-1 unit price $5.91), Mouser, LCSC, JLCPCB, and Hotenda, with LCSC listing at $2.24 in small quantities. Authorized distributors typically ship same-day from North American or Asian warehouses. Octopart compares 10 distributors for live stock and volume-break pricing, useful for BOM planning.
What is the lead time for PIC24FJ128GB406-I/MR when out of stock?
Lead time for the PIC24FJ128GB406-I/MR is generally 8-12 weeks from the factory when distributor stock is depleted, because Microchip manufactures the part in its own fabs. For production runs, Microchip's local FAE can release a backlog schedule; for prototyping, distributors like DigiKey and Mouser often have allocation lots reserved. Pre-ordering via a stocking distributor reduces risk.
PIC24FJ128GB406 vs PIC24FJ128GA410 - which is better for a USB + LCD design?
The PIC24FJ128GB406 is better for designs that need hardware AES encryption, because its integrated crypto engine offloads encryption by 5-10x versus software. The PIC24FJ128GA410 has a richer analog mix (24-bit sigma-delta AFE) but no hardware crypto and a different package. Both share USB OTG and LCD; choose GB406 when security dominates, GA410 when analog signal conditioning dominates.
When should I choose PIC24FJ128GB406 over PIC24FJ128GB204?
Choose the PIC24FJ128GB406 when you need 64 pins or higher with hardware crypto; the 64-QFN footprint also exposes more remappable peripherals. Choose the PIC24FJ128GB204 when a smaller 28/44-pin package is acceptable and you can implement AES in software. Both are PIC24F XLP parts, but the GB406 has more RAM (16 KB vs 8 KB) and more UART/SPI/I2C instances.
What is the best drop-in replacement for PIC24FJ128GB406-I/MR in the same 64-QFN package?
The best drop-in replacements in the same 64-QFN package are PIC24FJ256GB406-I/MR (256 KB Flash, 16 KB RAM, otherwise pin-to-pin identical) and PIC24FJ128GA406-I/MR (analog-rich sibling, 128 KB Flash, no hardware crypto). Both share the same 9 x 9 mm QFN land, identical pinout, and 2.0-3.6 V supply, allowing PCB drop-in replacement without re-spinning the layout.
Can PIC24FJ256GB406 replace PIC24FJ128GB406 without firmware changes?
In most cases, yes - the PIC24FJ256GB406 doubles Flash to 256 KB but keeps the same peripheral set, register map, and 64-QFN pinout, so existing PIC24FJ128GB406 firmware runs unchanged provided the linker script is updated for the larger Flash. According to Microchip, both parts belong to the same GB4 family, share the same errata, and use the same IDE/compiler toolchain. Verify only if your code uses Flash-specific configuration bits.
Where to download the PIC24FJ128GB406-I/MR datasheet PDF?
The datasheet PDF is available from Microchip's official product page at microchip.com/en-us/product/PIC24FJ128GB406, or via the FindIC mirror that hosts the full document. Microchip's parametric search also lists Family Reference Manual sections (FRM) for the crypto engine and LCD driver. Distributors like DigiKey and Mouser link the datasheet directly from the product detail page.
Where to find the PIC24FJ128GB406 pinout and QFN-64 land pattern?
The 64-QFN (9 x 9 x 0.9 mm) pinout is published in the Microchip datasheet's 'Pin Diagrams' and 'Package Marking' sections, and the recommended land pattern is in section 'Packaging Information'. Each pin (1-64) is numbered counter-clockwise starting from the top-left dot. XAIPART also publishes an SVG diagram for the QFN-64 (MR) footprint showing pin 1 orientation and thermal pad connections.
What supply voltage and current does PIC24FJ128GB406 require?
The PIC24FJ128GB406 operates from 2.0 V to 3.6 V with a typical VDD current of 8 mA at 32 MHz full activity and XLP deep-sleep current below 1 uA with RTCC and SRAM retained. The integrated 1.8 V core LDO requires a 10 uF + 0.1 uF bypass on Vcap for stability. Use a 3.3 V LDO with 100 mA headroom for USB suspend/resume peaks.
Does PIC24FJ128GB406 support USB On-The-Go (OTG) and host mode?
Yes - the USB peripheral on the PIC24FJ128GB406 is USB 2.0 Full-Speed (12 Mbps) OTG compliant, supporting device, host, and OTG dual-role modes via the integrated transceivers. It includes dedicated DMA channels for isochronous endpoints, a Session Request Protocol (SRP) and Host Negotiation Protocol (HNP) engine, and on-chip pull-up/pull-down resistors, so a USB connector is the only external analog needed.
What tools and IDEs support the PIC24FJ128GB406?
The PIC24FJ128GB406 is supported by Microchip's MPLAB X IDE, MPLAB XC16 C compiler, and MPLAB Harmony v3 framework. Programmers/debuggers include MPLAB ICD 4, MPLAB PICkit 4, and MPLAB Snap. For hobbyists, the Microstick for PIC24F dev kit (DM330013) provides an on-board debugger compatible with the 64-QFN via the PKOB (Programmer-On-Board) interface.

Données de référence d'ingénierie pour PIC24FJ128GB406-I/MR — comparaison, recommandations de conception et informations de conformité.

Guide de sélection

Choose the PIC24FJ128GB406-I/MR when you need a 16-bit MCU with integrated hardware AES, USB OTG, and a segment LCD driver in a single 64-QFN package, and your application firmware fits comfortably in 128 KB Flash and 16 KB RAM. If your code base exceeds 128 KB, step up to the PIC24FJ256GB406-I/MR or PIC24FJ1024GB606-I/MR for the same footprint. If you do not need hardware AES and instead prioritize analog signal conditioning, choose the PIC24FJ128GA406-I/MR. For smaller pin counts (28/44-pin), drop to the PIC24FJ128GB204 family at the cost of reduced peripherals and RAM. The PIC24FJ128GB406 occupies a sweet spot in Microchip's PIC24F XLP lineup balancing security, connectivity, and low power.

Comparaison avec les alternatives

Paramètre Ce produit PIC24FJ256GB406-I/MR PIC24FJ128GA406-I/MR PIC24FJ128GB410-I/MR PIC24FJ256GB410-I/MR PIC24FJ128GB204-I/MR PIC24FJ1024GB606-I/MR
Brand Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology
Package 64-QFN (9x9 mm) MR 64-QFN (9x9) - same 64-QFN (9x9) - same 64-QFN (9x9) - same 64-QFN (9x9) - same 64-QFN (9x9) - same 64-QFN (9x9) - same
Flash 128 KB 256 KB 128 KB 128 KB 256 KB 128 KB 1024 KB
RAM 16 KB 16 KB 16 KB 16 KB 16 KB 8 KB 32 KB
Hardware AES Yes (128/192/256-bit) Yes No No No Yes (smaller pkg) Yes
USB OTG Yes (Full-Speed) Yes Yes Yes Yes Yes Yes
LCD Driver Yes (segment) Yes Yes Yes Yes Yes Yes
Max CPU Speed 32 MHz / 16 MIPS 32 MHz / 16 MIPS 32 MHz / 16 MIPS 32 MHz / 16 MIPS 32 MHz / 16 MIPS 32 MHz / 16 MIPS 32 MHz / 16 MIPS
Supply Voltage 2.0 V to 3.6 V 2.0-3.6 V 2.0-3.6 V 2.0-3.6 V 2.0-3.6 V 2.0-3.6 V 2.0-3.6 V

Principaux différenciateurs

  • Integrated hardware AES-128/192/256 crypto engine (vs PIC24FJ128GA406-I/MR)
  • Doubles program Flash to 256 KB while preserving pinout (vs PIC24FJ256GB406-I/MR)
  • Massively scalable Flash (1 MB) without leaving the same package (vs PIC24FJ1024GB606-I/MR)

Notes de conception

Estimated: the 64-QFN (9x9) package requires a continuous ground plane beneath the exposed pad. Use 0.5 oz copper with 0.3 mm via stitching at 1.5 mm pitch connecting the EP to the inner ground pour. This keeps the junction-to-ambient thermal resistance at the datasheet value of approximately 28 C/W and prevents thermal throttling during sustained 32 MHz operation. Routing the USB D+/D- lines as a 90-ohm differential pair (length-matched within 150 mils) is mandatory for USB-IF compliance.

Place a 10 uF X7R + 0.1 uF NP0/C0G capacitor pair within 3 mm of the VCAP pin (1.8 V core LDO output). Use a low-ESR ceramic for the 10 uF and route a wide VDD/VSS trace to minimize inductance. The USB VUSB3V3 pin needs an additional 4.7 uF decoupling capacitor. For USB suspend/resume peaks, ensure the upstream 3.3 V LDO can source at least 100 mA without droop, otherwise VBUS-detect logic may falsely detect a detach event.

Do not leave the MCLR pin floating - tie it to VDD through a 10 kohm pull-up. The ICD PGEC/PGED pins (RB6/RB7) must be left disconnected in production to avoid debugger contention. The Peripheral Pin Select (PPS) registers must be unlocked before remapping; lock the registers again afterward or stray writes during EMI events can corrupt pin assignments. Finally, if USB OTG host mode is unused, tie the ID pin to ground.

Keep analog AVSS/AVDD separated from digital VSS/VDD with a ferrite bead or 0-ohm resistor, and place AVSS adjacent to the analog pins (RA0-RA7). Route the 32.768 kHz crystal traces within 5 mm of SOSCO/SOSCI with a guard ring tied to analog ground. For LCD segment outputs, route with 5-8 mil traces and add a ground keep-out underneath segment pads to minimize capacitive loading and cross-talk.

Informations de conformité

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Qualified
Sans plomb
Yes
Sans halogène
Unknown
Minerais de conflit
Compliant

RoHS compliant per Microchip product page. Industrial -40C to +85C temperature grade (-I suffix). Not AEC-Q100 qualified - not recommended for automotive applications; choose PIC24FJ...-E automotive variants if available. Halogen-free status not explicitly stated in provided data.

Données vérifiées le : 2026-09-29 — données vérifiées et sélectionnées par l'équipe d'ingénierie composants de XAIPART

Recherches associées

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Composants & termes associés

Microchip Technology PIC24FJ128GB406 PIC24FJ128GB406-I/MR PIC24FJ256GB406-I/MR PIC24FJ128GA406-I/MR PIC24FJ128GB410-I/MR PIC24FJ1024GB606-I/MR PIC microcontroller 16-bit MCU modified-Harvard architecture MIPS AES-128/192/256 USB OTG XLP (eXtreme Low Power) QFN-64 9x9 mm package JEDEC J-STD-020 RoHS LCD segment driver Peripheral Pin Select (PPS) AES (FIPS-197) ICSP (In-Circuit Serial Programming) embedded processor integrated circuit
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