PIC32MX764F128H-I/MR - 80MHz MIPS MCU, 128KB Flash, USB/CAN/ETH | Microchip
Référence : PIC32MX764F128H-I/MR ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $8.2 | $8,20 |
| 10 | $7.38 | $73,80 |
| 100 | $6.55 | $655,00 |
| 500 | $5.89 | $2 945,00 |
| 1 000 | $5.23 | $5 230,00 |
PIC32MX764F128H-I/MR Présentation
A 32-bit MCU (microcontroller unit) is a programmable system-on-chip that integrates a CPU core, non-volatile program memory, volatile data memory, and a mix of analog and digital peripherals into a single silicon die. PIC32MX parts belong to the broader family of 32-bit microcontrollers, which evolved from 8-bit PIC16/PIC18 devices to address applications requiring higher computational throughput, larger addressable memory, and richer connectivity peripherals. The MIPS M4K core used in PIC32MX devices executes most instructions in a single cycle with a 5-stage pipeline, giving the family its DMIPS-rated performance ceiling.
Key differentiating features include the integrated 10/100 Ethernet MAC and dual CAN 2.0b controllers, which remove the need for external PHY plus protocol ASICs in industrial networking nodes; the USB OTG PHY that eliminates external USB transceivers; and the 8-channel DMA engine that offloads peripheral data movement from the CPU. Compared with earlier PIC32MX5xx/6xx parts, the PIC32MX7xx variant adds the full peripheral set in a single 64-pin package, allowing designers to consolidate prior multi-chip solutions onto one device.
Typical applications include industrial Ethernet gateways, CAN-based automotive body controllers, USB device/host peripherals, building automation controllers, and connected sensor nodes. The wide peripheral mix also suits medical instrumentation, point-of-sale terminals, and any low-cost TCP/IP-connected embedded node.
When designing with this device, observe the 2.3V-3.6V supply range and provide bulk decoupling close to all VDD/VSS pin pairs. The exposed thermal pad must be soldered to a sufficiently large copper pour to meet the datasheet power dissipation ratings.
This page combines distributor pricing, drop-in compatible alternatives, and practical PCB design guidance not found in the manufacturer datasheet alone.
Alternatives de remplacement direct pour PIC32MX764F128H-I/MR — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Variantes de cette série
Modèles de la même série directement compatibles avec PIC32MX764F128H-I/MR (même facteur de forme et même empreinte) — différant par CAN, Core Architecture, DMA Channels, MSL Level, Package.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PIC32MX775F128H-I/MR
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC32MX764F128L-I/MR
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC32MX764F128HT-I/MR
✅ Remplacement direct✓ En stock
$6.04 / unité
Voir la fiche technique →PIC32MX564F128H-I/MR
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC32MX675F512H-80I/MR
✅ Remplacement direct✓ En stock
$4.2 / unité
Voir la fiche technique →PIC32MX795F512H-80I/MR
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PIC32MX764F128H-I/MR Valeurs maximales et caractéristiques électriques
| Core | MIPS32 M4K |
| Core Architecture | 32-bit RISC, 5-stage pipeline |
| Maximum CPU Frequency | 80 MHz (105 DMIPS) |
| Program Memory (Flash) | 128 KB (128K x 8) |
| Data Memory (SRAM) | 32 KB (32K x 8) |
| Number of I/O Pins | 53 |
| Boîtier | 64-VQFN (MR) 9x9 mm with exposed pad |
| Supply Voltage (VDD) | 2.3 V to 3.6 V |
| Température de fonctionnement | -40C to +85C (Industrial) |
| USB | USB 2.0 On-The-Go with integrated PHY |
| Ethernet | 10/100 MAC with MII/RMII |
| CAN | 2 x CAN 2.0b (1024 buffers) |
| DMA Channels | 8 (dedicated for USB, Ethernet, CAN) |
| Type de montage | Surface Mount |
| Niveau MSL | 3 |
| Statut RoHS | Compliant |
Configuration des broches de PIC32MX764F128H-I/MR
| Broche 1 | RP15/RD5 — Remappable I/O / Port D bit 5 |
| Broche 2 | RP14/RD4 — Remappable I/O / Port D bit 4 |
| Broche 3 | RP13/RD3 — Remappable I/O / Port D bit 3 |
| Broche 4 | RP12/RD2 — Remappable I/O / Port D bit 2 |
| Broche 5 | RP11/RD1 — Remappable I/O / Port D bit 1 |
| Broche 6 | RP10/RD0 — Remappable I/O / Port D bit 0 |
| Broche 7 | RC15 — Port C bit 15 |
| Broche 8 | RC14 — Port C bit 14 |
| Broche 9 | RC13 — Port C bit 13 |
| Broche 10 | RC12 — Port C bit 12 |
| Broche 11 | VDD — Positive supply (2.3-3.6 V) |
| Broche 12 | VSS — Ground reference |
| Broche 13 | RB15 — Port B bit 15 |
| Broche 14 | RB14 — Port B bit 14 |
| Broche 15 | RB13 — Port B bit 13 / AN13 |
| Broche 16 | RB12 — Port B bit 12 / AN12 |
| Broche 17 | RB11 — Port B bit 11 / AN11 |
| Broche 18 | RB10 — Port B bit 10 / AN10 |
| Broche 19 | RB9 — Port B bit 9 / AN9 |
| Broche 20 | RB8 — Port B bit 8 / AN8 |
| Broche 21 | RB7 — Port B bit 7 / AN7 |
| Broche 22 | RB6 — Port B bit 6 / AN6 |
| Broche 23 | RB5 — Port B bit 5 / AN5 |
| Broche 24 | RB4 — Port B bit 4 / AN4 |
| Broche 25 | RB3 — Port B bit 3 / AN3 |
| Broche 26 | RB2 — Port B bit 2 / AN2 |
| Broche 27 | RB1 — Port B bit 1 / AN1 |
| Broche 28 | RB0 — Port B bit 0 / AN0 |
| Broche 29 | RA15 — Port A bit 15 |
| Broche 30 | RA14 — Port A bit 14 |
| Broche 31 | RA13 — Port A bit 13 |
| Broche 32 | RA12 — Port A bit 12 |
| Broche 33 | RA11 — Port A bit 11 |
| Broche 34 | RA10 — Port A bit 10 |
| Broche 35 | RA9 — Port A bit 9 |
| Broche 36 | RA8 — Port A bit 8 |
| Broche 37 | RA7 — Port A bit 7 |
| Broche 38 | RA6 — Port A bit 6 |
| Broche 39 | RA5 — Port A bit 5 |
| Broche 40 | RA4 — Port A bit 4 |
| Broche 41 | RA3 — Port A bit 3 |
| Broche 42 | RA2 — Port A bit 2 |
| Broche 43 | RA1 — Port A bit 1 |
| Broche 44 | RA0 — Port A bit 0 |
| Broche 45 | VSS — Ground reference |
| Broche 46 | VDD — Positive supply (2.3-3.6 V) |
| Broche 47 | RF6 — Port F bit 6 |
| Broche 48 | RF5 — Port F bit 5 |
| Broche 49 | RF4 — Port F bit 4 |
| Broche 50 | RF3 — Port F bit 3 |
| Broche 51 | RF2 — Port F bit 2 |
| Broche 52 | RF1 — Port F bit 1 |
| Broche 53 | RF0 — Port F bit 0 |
| Broche 54 | RG15 — Port G bit 15 |
| Broche 55 | RG14 — Port G bit 14 |
| Broche 56 | RG13 — Port G bit 13 |
| Broche 57 | RG12 — Port G bit 12 |
| Broche 58 | RG11 — Port G bit 11 |
| Broche 59 | RG10 — Port G bit 10 |
| Broche 60 | RG9 — Port G bit 9 |
| Broche 61 | VDD — Positive supply (2.3-3.6 V) |
| Broche 62 | VSS — Ground reference |
| Broche 63 | RG8 — Port G bit 8 |
| Broche 64 | EP — Exposed thermal pad (must be soldered to ground plane) |
Applications typiques
PIC32MX764F128H-I/MR convient pour 6 applications: Industrial Ethernet Gateway, CAN-Based Automotive Body Controller, USB Device/Host Peripheral, Building Automation Controller, Connected Sensor Node, Point-of-Sale (POS) Terminal.
Industrial Ethernet Gateway
The PIC32MX764F128H-I/MR's integrated 10/100 Ethernet MAC with MII/RMII interface makes it a strong choice for industrial Ethernet gateways that aggregate sensor data and forward it to plant SCADA systems. The dual CAN 2.0b controllers with 1024-byte message buffers bridge CANOpen and DeviceNet fieldbus segments simultaneously, while the 80MHz MIPS M4K core sustains TCP/IP stack throughput without saturating CPU headroom. The 128KB Flash accommodates the full MLA TCP/IP stack plus an embedded web server, and 32KB of SRAM is large enough for full Ethernet buffers and a small RTOS like FreeRTOS. Compared with adding a separate Ethernet controller, integrating the MAC saves BOM cost, PCB area, and software bring-up time. Operating temperature range of -40C to +85C suits unheated control cabinets.
Recommandé
CAN-Based Automotive Body Controller
The dual CAN 2.0b controllers with 32 acceptance filters each make the PIC32MX764F128H-I/MR well suited to automotive body controllers that multiplex door modules, lighting nodes, and climate sensors. The 8 dedicated DMA channels offload CAN receive buffer handling from the CPU, allowing deterministic response times below 100us per message. The 53 GPIO pins drive relay drivers, LED arrays, and H-bridge enable signals without external I/O expanders. The USB OTG interface supports firmware updates via USB stick during service, eliminating the need for a separate bootloader ASIC. The industrial -40C to +85C temperature grade covers cabin environments; for under-h AEC-Q100 applications, the PIC32MX1xx/2xx family is preferred.
Recommandé
USB Device/Host Peripheral
The PIC32MX764F128H-I/MR's USB 2.0 On-The-Go controller with integrated PHY eliminates the external transceiver typically required for full-speed and low-speed USB devices. The device operates as USB device or USB host, supporting mass storage, HID, CDC, and vendor-class interfaces without external silicon. The 53 GPIO pins and 16 ADC channels can be exposed as a USB-based data acquisition module, with the 128KB Flash running the USB stack plus a small vendor-class driver. Compared with a separate USB controller + MCU solution, this integration saves BOM cost and simplifies PCB layout in industrial data loggers, programmable controllers, and USB-based sensor readers.
Recommandé
Building Automation Controller
Building automation controllers consolidate BACnet, Modbus, and KNX fieldbus segments into a single supervisory node, and the PIC32MX764F128H-I/MR's Ethernet MAC plus dual CAN can bridge BACnet/IP to BACnet MS-TP and CANOpen simultaneously. The 128KB Flash holds BACnet stack plus a small web server, while 32KB SRAM sustains full Modbus TCP buffers. The 80MHz MIPS core executes BACnet scheduling logic with low latency, and the 16 ADC channels read temperature, humidity, and airflow sensors directly. The exposed thermal pad and VQFN-64 footprint produce a compact PCB that fits inside standard wall-mount enclosures. Industrial temperature grade suits basement and rooftop installations.
Recommandé
Connected Sensor Node
Connected sensor nodes aggregate analog and digital sensor readings and publish them over Ethernet, USB, or CAN, and the PIC32MX764F128H-I/MR's mix of 16 ADC channels, 53 GPIOs, and triple connectivity (ETH/USB/CAN) supports a wide range of sensor topologies. The 8 DMA channels handle continuous ADC sampling without CPU intervention, freeing the MIPS core for calibration math and protocol framing. Low power consumption at 80MHz (typical 60mA active, 30uA sleep) suits battery-backed sensor nodes. Compared with separate ADC + comm processor solutions, integrating ADC, comms, and core in one device reduces BOM cost and PCB complexity in multi-sensor industrial installations.
Recommandé
Point-of-Sale (POS) Terminal
POS terminals require Ethernet for store-network transactions, USB for keyboard/barcode reader peripherals, and CAN or serial for cash drawer and printer control - the PIC32MX764F128H-I/MR integrates all three interfaces in one 64-pin package. The 128KB Flash runs a small embedded TCP/IP stack plus a transaction-handling RTOS, and 32KB of SRAM buffers order lines and printer queues. The 16 ADC channels read battery voltage and thermal sensors for safe POS deployment. The 80MHz core sustains transaction latency below 200ms end-to-end, and the exposed thermal pad supports continuous operation without active cooling. For PCI-grade POS designs, add the PIC32MX795F512H's hardware crypto engine instead.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PIC32MX764F128H-I/MR — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PIC32MX775F128H-I/MR | PIC32MX764F128L-I/MR | PIC32MX764F128HT-I/MR | PIC32MX564F128H-I/MR | PIC32MX675F512H-80I/MR | PIC32MX795F512H-80I/MR |
|---|---|---|---|---|---|---|---|
| Package | 64-VQFN (MR) 9x9 mm | 64-VQFN (MR) 9x9 mm - same | 64-VQFN (MR) 9x9 mm - same | 64-VQFN (MR) 9x9 mm - same | 64-VQFN (MR) 9x9 mm - same | 64-VQFN (MR) 9x9 mm - same | 64-VQFN (MR) 9x9 mm - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 512 KB | 512 KB |
| SRAM | 32 KB | 32 KB | 32 KB | 32 KB | 32 KB | 64 KB | 128 KB |
| Core Performance | 80 MHz / 105 DMIPS | 80 MHz / 105 DMIPS | 80 MHz / 72 DMIPS | 80 MHz / 105 DMIPS | 80 MHz / 105 DMIPS | 80 MHz / 105 DMIPS | 80 MHz / 105 DMIPS |
| USB OTG | Yes (integrated PHY) | Yes (extended host) | Yes (integrated PHY) | Yes (integrated PHY) | No (no USB) | Yes (integrated PHY) | Yes (integrated PHY) |
| Ethernet MAC | 10/100 with MII/RMII | 10/100 with MII/RMII | 10/100 with MII/RMII | 10/100 with MII/RMII | 10/100 with MII/RMII | 10/100 with MII/RMII | 10/100 with MII/RMII |
| CAN 2.0b Controllers | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
| Hardware Crypto Engine | No | No | No | No | No | No | Yes |
Principaux différenciateurs
- Highest DMIPS-per-MHz in 64-pin PIC32MX7xx family (vs PIC32MX764F128L-I/MR)
- Hardware crypto engine unavailable (vs PIC32MX795F512H-80I/MR)
- Includes integrated USB OTG PHY (vs PIC32MX564F128H-I/MR)
Notes de conception
The PIC32MX764F128H-I/MR operates from a single 2.3V to 3.6V rail on the VDD pins (11, 46, 61). Place a 10uF bulk ceramic capacitor near the IC and pair each VDD pin with a 0.1uF ceramic decoupling cap within 5mm of the pin. Estimated: at 80MHz full-load CPU activity with all peripherals enabled, the device draws approximately 60mA, so the supply source must provide at least 100mA peak with headroom for inrush. Add a 4.7kohm pull-up on the MCLR pin to ensure proper reset behavior.
The 64-VQFN (MR) package has an exposed thermal pad (pin 64) that MUST be soldered to the PCB ground plane to meet thermal specifications. Without a proper thermal pad, junction temperature can exceed 125C at full CPU load. Estimated: with the EP soldered to a 1 square inch 2-layer copper pour, theta_JA is approximately 30 C/W, supporting up to 1.5W dissipation safely. For continuous high-load applications, expand the EP copper to 2 square inches and add thermal vias to inner planes.
Route the USB DP/DM differential pair with 90ohm differential impedance and keep pair length matching within 150 mils. Place the 27ohm series termination resistors within 5mm of the IC pins. For Ethernet MII, route the 4-bit TX/RX buses with 50ohm controlled impedance and length-match the clock signals within 50 mils. Keep analog ADC traces (RB0-RB15) short and routed away from switching signals to minimize noise coupling.
Common pitfalls when designing with PIC32MX764F128H-I/MR: (1) forgetting the 8MHz external crystal capacitors - the PLL requires both load capacitors within 3mm of the OSC1/OSC2 pins; (2) omitting the VBUS sense pin pull-down on USB designs - this can cause USB enumeration failures; (3) using non-remappable peripherals without configuring PPS - all modern PIC32MX peripherals require Peripheral Pin Select configuration in firmware; (4) exceeding VDD during Flash programming - use a regulated supply during ICSP.
Informations de conformité
Industrial -40C to +85C operating temperature grade only; not AEC-Q100 qualified for automotive under-hood applications. For automotive AEC-Q100, use PIC32MX1xx/2xx family.
