DS90LV028ATM - Dual 400 Mbps LVDS Receiver | Texas Instruments
MPN: DS90LV028ATM ✓ פעילDS90LV028ATM סקירה
An LVDS receiver is an interface IC within the broader line-receiver and interface-IC hierarchy. LVDS is a differential signaling technology in which data is transmitted as the voltage difference between two complementary conductors. That architecture provides useful noise immunity for high-speed links, while the receiver converts the small differential signal into a single-ended CMOS output that can be processed by digital logic, a controller, or a field-programmable gate array.
According to the Texas Instruments DS90LV028A product page, the device is designed for applications requiring ultra-low power dissipation, low noise, and high data rates. The verified technical summary identifies a maximum data rate in excess of 400 Mbps, equivalent to a 200 MHz parallel data rate. The related distributor data also identifies a 3 V supply class, a 1.5 ns receiver performance figure, and approximately 9 mA of operating current, although the exact test conditions are not included in the supplied excerpts.
The DS90LV028A family provides two independent receiver channels, making it useful in point-to-point industrial links, test and measurement equipment, instrumentation, and backplane communication. The 8-pin SOIC footprint simplifies assembly in designs that already use conventional surface-mount packages. Because LVDS is a differential interface, each receiver channel requires a matched differential input and appropriate cable or board-level termination.
Designers should preserve the receiver's common-mode operating limits, provide the specified termination network, and maintain a controlled return path between the transmitter and receiver. Differential routing on the printed circuit board should minimize impedance discontinuities and keep the pair length-matched. The receiver should also be evaluated for fail-safe behavior when the cable is open, shorted, or terminated because those conditions affect receiver metastability and output state.
This product page consolidates the verified manufacturer specifications, distributor identifiers, package information, application guidance, and substitution constraints for DS90LV028ATM. It also distinguishes a true pin-compatible replacement from similar LVDS receivers that require a different pinout, circuit modification, or data-rate tradeoff.
חלופות תחליף ישיר עבור DS90LV028ATM — אותו מארז, תואם פין-לפין. חלקים במארז שונה הדורשים עיבוד מחדש של ה-PCB אינם נכללים.
אין חלופות תואמות Drop-in עבור מוצר זה.
בקשת חלופותDS90LV028ATM מפרטים
| Device Type | Dual CMOS differential line receiver |
| Number of Receiver Channels | 2 channels |
| Signaling Standard | Low Voltage Differential Signaling (LVDS) |
| Minimum Supported Data Rate | 400 Mbps (200 MHz) |
| Typical Differential Input Voltage | 350 mV |
| Supply Voltage Class | 3 V |
| Receiver Propagation Delay | 1.5 ns |
| Operating Current | 9 mA |
| טווח טמפרטורת פעולה | -40 C to +85 C |
| Output Interface | CMOS |
| מארז | 8-pin SOIC |
| סוג הרכבה | Surface mount |
| מספר פינים | 8 pins |
מדריך תצורת פינים של DS90LV028ATM 8-pin soic
תצורת פינים עבור DS90LV028ATM (מארזת 8-pin soic). מספרי פינים, פונקציות ותרשימי חיבורים מוגדרים ב-Datasheet של היצרן. יש לעיין בו לקבלת ה-footprint המדויק והנחיות הלחמה.
אין נתוני פריסת פינים מפורטים עבור DS90LV028ATM.
עיינו ב- גיליון נתונים עבור תצורת פינים מלאה.
יישומים טיפוסיים
DS90LV028ATM מתאים עבור 6 יישוםs: High-Speed Industrial Point-to-Point Links, FPGA and High-Speed Digital Interfaces, Test and Measurement Instrumentation, Instrumentation and Data Acquisition, Industrial Backplane Communication, Robotics and Automation Communications.
High-Speed Industrial Point-to-Point Links
The DS90LV028ATM is appropriate for industrial point-to-point links that require two low-power differential receive channels at rates in excess of 400 Mbps. Place the receiver near the cable or board-to-board connector so the LVDS pair reaches the input with minimal loss and disturbance. The 8-pin SOIC package also allows reuse of an existing surface-mount assembly pattern. Designers must confirm the complete pinout and termination arrangement from the manufacturer datasheet, because the verified excerpts identify a typical 350 mV differential input but do not provide the full routing table.
FPGA and High-Speed Digital Interfaces
The DS90LV028ATM can translate two LVDS differential inputs into CMOS-compatible outputs for a digital controller or FPGA. Its verified capability above 400 Mbps provides useful margin for high-speed communication paths, while the reported 1.5 ns propagation delay supports timing analysis of the receive stage. Place the receiver outputs close to the FPGA interface and control differential-pair geometry to minimize reflections. Confirm output rise and fall times, input thresholds, and fail-safe states before relying on the receiver in a production FPGA link.
Test and Measurement Instrumentation
DS90LV028ATM suits test and measurement equipment that receives differential signals from remote sensor heads, fixtures, or instrument modules. The dual receiver arrangement consolidates two channels into one 8-pin SOIC, helping conserve board area while maintaining a data rate above 400 Mbps. A controlled ground reference and appropriately terminated transmission line are essential for reliable operation. The operating-temperature range of -40 C to +85 C supports industrial environments, but the design should account for the receiver's exact supply and common-mode limits from the full datasheet.
Instrumentation and Data Acquisition
The DS90LV028ATM can serve as the input stage of a data-acquisition or instrumentation system carrying fast differential commands or measurements. Its reported 9 mA operating current and 3 V supply class are consistent with low-power interface use, while the two receiver channels support compact multi-channel front ends. Each differential pair should be routed with matched impedance and a continuous reference plane. The selected termination must be evaluated with the complete transmitter and receiver network so that excessive loading or signal reflections do not reduce margin.
Industrial Backplane Communication
For short-distance backplane links, DS90LV028ATM can recover LVDS data at rates above 400 Mbps where noise immunity and compact receiver packaging are important. Its dual-channel architecture allows adjacent differential pairs to terminate into one receiver package. Layout must preserve controlled differential impedance and provide an uninterrupted ground reference beneath the pair. Designers should also evaluate connector and via transitions, connector loss, and the receiver's fail-safe response to an unplugged or powered-down neighbor before approving the backplane topology.
Robotics and Automation Communications
DS90LV028ATM is applicable to automation and robotics subsystems that exchange high-speed differential commands between a controller and peripheral modules. The 8-pin SOIC package supports conventional automated-board assembly, and the -40 C to +85 C range covers many industrial environments. Use controlled-impedance routing for each LVDS pair and place termination exactly where required by the link architecture. Because the standard DS90LV028ATM is not explicitly identified as automotive-qualified in the supplied data, safety-related or vehicle systems should use a separately qualified automotive order code.
נתוני עזר הנדסיים עבור DS90LV028ATM — השוואה, הנחיות תכנון ומידע על תאימות.
מדריך בחירה
השוואה עם חלופות
| פרמטר | מוצר זה |
|---|---|
| Device Type | Dual CMOS differential line receiver |
| Brand | Texas Instruments |
| Package | 8-pin SOIC |
| Receiver Channels | 2 channels |
| Signaling Standard | LVDS |
| Maximum Data Rate | In excess of 400 Mbps (200 MHz) |
| Typical Differential Input | 350 mV |
| Supply Voltage Class | 3 V |
| Propagation Delay | 1.5 ns |
| Operating Current | 9 mA |
| Operating Temperature | -40 C to +85 C |
מבדילים עיקריים
- High data-rate capability in a compact dual receiver (לעומתSN65LVDS9637D)
- Established 8-pin SOIC receiver format (לעומתADN4664BRZ-REEL7)
- Two independent CMOS receive channels (לעומתSingle-channel LVDS receiver designs)
הערות תכנון
Route each LVDS pair as a controlled-impedance, length-matched differential pair over a continuous reference plane. Avoid stubs, unnecessary vias, and changes in layer stack-up between transmitter and receiver. Place DS90LV028ATM close to the connector or board interface so the high-speed differential signal is not exposed to excessive trace and connector loss.
Implement the receiver termination and fail-safe arrangement specified in the manufacturer datasheet. The verified excerpts do not define the required termination value or internal fail-safe behavior, so neither should be guessed. Analyze the complete transmitter, line, connector, and receiver network because adding or changing termination can materially affect the receiver's differential voltage and timing margin.
Provide a clean 3 V-class supply and place the local decoupling network at the receiver power pins. Although the verified operating-current figure is 9 mA, the exact supply limits and capacitor recommendations are not included in the supplied excerpts. Follow the manufacturer layout and power recommendations, and keep return-current paths continuous beneath the high-speed pair.
Do not substitute a receiver merely because it is described as a dual LVDS device. The supplied comparison for SN65LVDS9637D indicates different principal parameters and possible circuit modifications, while the ADN4664 comparison explicitly describes a different pinout and fail-safe biasing. Validate package, pin functions, data rate, supply range, termination, and fail-safe state before approving any replacement.
מידע על תאימות
The supplied excerpts do not extract RoHS, REACH, lead-free, halogen-free, or conflict-minerals declarations. Texas Instruments separately identifies DS90LV028A-Q1 as automotive, but the standard DS90LV028ATM was not explicitly identified as AEC-Q100 qualified in the supplied data.