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Macronix

MX30LF1G18AC-TJ-TR - 1Gbit SLC NAND Flash 3V TSOP-48 | Macronix

MPN: MX30LF1G18AC-TJ-TR ✓ פעיל
2.7 V to 3.6 V Vdss 48-pin TSOP-I (12mm x 20mm) Package Non-Volatile FLASH - NAND (SLC) Memory
כמות הזמנה מינימלית: 1 |

MX30LF1G18AC-TJ-TR סקירה

The Macronix MX30LF1G18AC-TJ-TR is a 1 Gbit (128M x 8) Single-Level Cell (SLC) NAND Flash memory operating from a single 2.7V to 3.6V supply and housed in a 48-pin TSOP-I (TJ) package. According to the Macronix MX30LF1G18AC datasheet, the device offers a 20 ns asynchronous page read access time, a 25 us first-byte cache read latency, and ONFI 1.0 compatibility for standardized NAND command sets. The part requires 4-bit ECC per 528-byte sector for reliable read endurance across 100,000 program/erase cycles.

A NAND Flash memory is a non-volatile storage technology that retains data without power by storing charge on a floating-gate transistor array organized as pages and blocks. SLC NAND stores one bit per cell, giving it higher endurance, faster write speeds, and lower bit error rates than MLC or TLC NAND. In the broader taxonomy: NAND Flash -> non-volatile memory -> flash memory -> semiconductor memory IC. The MX30LF1G18AC belongs to Macronix's MX30LF 3V SLC NAND family, optimized for industrial and embedded designs that demand high reliability under extended temperature conditions.

Key differentiating features of the MX30LF1G18AC include an internal data register for cache read operation, a hardware-based WP# pin for write protection, and a multi-plane page program architecture supporting up to 4-bit ECC. The device supports 2K + 64 byte pages and 128K + 4K byte blocks, with sequential read throughput of 20 ns per byte (50 MB/s). It also supports the ONFI Parameter Page read for standardized software driver support across operating systems.

Technical architecture: The MX30LF1G18AC uses a charge-trap/standard floating-gate cell array manufactured on a mature CMOS process, paired with an on-chip charge pump that generates the high voltages required for program and erase operations. An internal data register (1 page = 2K + 64 bytes) acts as a buffer between the NAND cell array and the external I/O bus, enabling cache read modes that improve effective throughput. The controller logic implements ONFI 1.0 standard commands plus Macronix-specific extensions for unique features such as the Program Toggle (PT) function on pin 38.

Typical applications include industrial control system firmware storage, automotive infotainment and telematics data logging, networking equipment boot and configuration storage, and embedded Linux/ RTOS file system media (JFFS2, UBI/UBIFS, YAFFS). The combination of 1 Gbit density and ONFI compliance makes it well-suited as a removable boot medium in set-top boxes and routers.

Design consideration: Always provide 4-bit ECC per 528-byte sector using the host controller or FPGA logic; the MX30LF1G18AC does not include an internal ECC engine. Bad-block management must be implemented in software by scanning the factory-marked bad-block table at first power-up.

This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

חלופות תחליף ישיר עבור MX30LF1G18AC-TJ-TR — אותו מארז, תואם פין-לפין. חלקים במארז שונה הדורשים עיבוד מחדש של ה-PCB אינם נכללים.

וריאנטים בסדרה זו

דגמים מאותה סדרה התואמים Drop-in עם MX30LF1G18AC-TJ-TR (אותו גורם צורה וטביעת רגל) — שונים ב Block Size, Interface, MSL Level, Memory Type, Operating Temperature.

Macronix
Block Size: 128 Kbytes (64 pages)
Interface: Parallel (multiplexed Command/Address/Data)
MSL Level: 3 (168 hours)
השווה עם MX30LF1G18AC-TJ-TR →

MX30LF1G18AC-TJ

✅ Drop-In
📦 48-pin TSOP-I
same die, tray packaging vs tape & reel, pin-to-pin compatible

📋 חלופה להתייחסות (לא בקטלוג)

MX30LF1G18AC-TI

✅ Drop-In
📦 48-pin TSOP-I
same die, industrial temperature grade, tray packaging

📋 חלופה להתייחסות (לא בקטלוג)

MX30LF2G18AC-TJ

✅ Drop-In
📦 48-pin TSOP-I
2 Gbit vs 1 Gbit density (+100%), same TSOP-48 pinout, ONFI 1.0

📋 חלופה להתייחסות (לא בקטלוג)

MX30LF1G08AA

✅ Drop-In
Macronix
📦 48-pin TSOP-I
FLASH - NAND (SLC) · 1 Gbit (128M x 8) · 128M x 8 · Parallel (multiplexed Command/Address/Data) · 2.7 V to 3.6 V (typ. 3.3 V) · 25 ns / 30 ns (asynchronous) · 2 Kbytes + 64 bytes spare · 128 Kbytes (64 pages)

צור קשר לקבלת מחיר

הצג גיליון נתונים ←

MX30LF1G18AC-TJ-TR דירוגים מרביים ומאפיינים חשמליים

סוג זיכרון Non-Volatile FLASH - NAND (SLC)
Memory Format FLASH
Density 1 Gbit (128M x 8)
Memory Organization 128M x 8
ממשק Parallel (ONFI 1.0 compliant)
Supply Voltage (VCC) 2.7 V to 3.6 V
Access Time (Async Page Read) 20 ns
Cache Read First-Byte Latency 25 us
Page Size 2K + 64 bytes
Block Size 128K + 4K bytes
Required ECC 4-bit per 528-byte sector
Program/Erase Endurance 100,000 cycles (typical)
טמפרטורת פעולה -40C to +105C (industrial)
מארז 48-pin TSOP-I (12mm x 20mm)
סוג הרכבה Surface Mount
רמת MSL 3
סטטוס RoHS Compliant

תצורת פינים של MX30LF1G18AC-TJ-TR

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
פין 1 NC — Not connected
פין 2 NC — Not connected
פין 3 NC — Not connected
פין 4 NC — Not connected
פין 5 NC — Not connected
פין 6 NC — Not connected
פין 7 RE# — Read Enable (active low)
פין 8 CE# — Chip Enable (active low)
פין 9 NC — Not connected
פין 10 NC — Not connected
פין 11 NC — Not connected
פין 12 ALE — Address Latch Enable
פין 13 WP# — Write Protect (active low)
פין 14 NC — Not connected
פין 15 NC — Not connected
פין 16 CLE — Command Latch Enable
פין 17 NC — Not connected
פין 18 NC — Not connected
פין 19 NC — Not connected
פין 20 NC — Not connected
פין 21 NC — Not connected
פין 22 NC — Not connected
פין 23 VSS — Ground
פין 24 NC — Not connected
פין 25 NC — Not connected
פין 26 NC — Not connected
פין 27 NC — Not connected
פין 28 NC — Not connected
פין 29 I/O0 — Data I/O bit 0
פין 30 I/O1 — Data I/O bit 1
פין 31 WE# — Write Enable (active low)
פין 32 I/O2 — Data I/O bit 2
פין 33 I/O3 — Data I/O bit 3
פין 34 I/O4 — Data I/O bit 4
פין 35 I/O5 — Data I/O bit 5
פין 36 I/O6 — Data I/O bit 6
פין 37 I/O7 — Data I/O bit 7
פין 38 PT — Program Toggle (leave floating if unused)
פין 39 NC — Not connected
פין 40 NC — Not connected
פין 41 R/B# — Ready/Busy (open drain, active low)
פין 42 NC — Not connected
פין 43 NC — Not connected
פין 44 NC — Not connected
פין 45 NC — Not connected
פין 46 NC — Not connected
פין 47 VCC — Power supply (2.7V to 3.6V)
פין 48 VSS — Ground

יישומים טיפוסיים

MX30LF1G18AC-TJ-TR מתאים עבור 6 יישוםs: Industrial Control System Firmware Storage, Automotive Infotainment and Telematics, Networking Equipment Boot and Configuration Storage, Embedded Linux File System Media, Set-Top Box and IoT Gateway Storage, Industrial Printer and Point-of-Sale Data Logging.

🏭

Industrial Control System Firmware Storage

The MX30LF1G18AC-TJ-TR is well-suited for industrial PLC and HMI firmware storage due to its 1 Gbit SLC NAND density, 100,000 P/E cycle endurance, and -40C to +105C industrial temperature rating. The 4-bit ECC per 528-byte sector requirement and ONFI 1.0 standardized command set enable robust Linux or RTOS boot media with UBI/UBIFS file systems. The 48-pin TSOP-I package allows hand-rework and field-replacement by service technicians, while the 20 ns page read access time provides sub-millisecond boot latency.

🚗

Automotive Infotainment and Telematics

The MX30LF1G18AC-TJ-TR is suitable for automotive infotainment boot, navigation map cache, and telematics event-log storage where data integrity over wide temperature ranges is critical. Its 1 Gbit SLC density accommodates 4-8 MB of compressed map tiles or up to 64,000 telemetry events with ONFI parameter page support enabling standard UBI wear-leveling. The 4-bit ECC per 528-byte sector ensures bit-error rates below 10^-15 across 100K P/E cycles, and the 48-pin TSOP-I footprint fits automotive PCB thermal profiles.

🌐

Networking Equipment Boot and Configuration Storage

The MX30LF1G18AC-TJ-TR serves as a reliable boot and configuration memory in routers, switches, and wireless access points where deterministic startup time and high read throughput matter. The 50 MB/s sequential read throughput enables sub-50ms OS image load, while the 25 us cache-read first-byte latency is acceptable for bootloader initialization. ONFI 1.0 compliance means drivers in OpenWRT, VxWorks, and stock router firmware can use the device without proprietary patches, and the 1 Gbit density suits 8-16 MB firmware+config layouts.

🖥️

Embedded Linux File System Media

The MX30LF1G18AC-TJ-TR is ideal as a file system medium for embedded Linux designs running JFFS2, YAFFS, or UBI/UBIFS where SLC NAND endurance is critical. The 4-bit ECC per 528-byte sector requirement and ONFI standardized bad-block table enables automatic wear-leveling and bad-block management by Linux MTD drivers. With 100,000 P/E cycles per block, the device typically achieves 5+ years of write-intensive logging. The 48-pin TSOP-I pinout is compatible with standard NAND adapter boards for prototyping.

📺

Set-Top Box and IoT Gateway Storage

The MX30LF1G18AC-TJ-TR provides 128 MB of reliable non-volatile storage for set-top box operating systems, channel guides, and IoT gateway data buffers. Its 1 Gbit SLC density holds a typical embedded Linux distribution plus application data, while the 20 ns page read access time supports fast channel-zap response. The industrial temperature range allows deployment in unconditioned outdoor enclosures for IoT gateway applications, and the 48-pin TSOP-I package remains easy to handle during low-volume manufacturing.

🧩

Industrial Printer and Point-of-Sale Data Logging

The MX30LF1G18AC-TJ-TR excels in industrial printers and POS terminals where transaction logs and firmware updates must survive harsh electrical and thermal environments. Its 1 Gbit SLC NAND stores up to 1 million transaction records, while the 4-bit ECC per 528-byte sector prevents data corruption across the 100,000 P/E cycle lifetime. The 48-pin TSOP-I package with -40C to +105C rating handles printer enclosure temperatures, and ONFI 1.0 standard commands allow universal driver support across multiple embedded OS families.

סיכום מוצרים מומלצים

MAX1760 DC-DC regulator for 3.3V NAND supply בשימוש ב-: Industrial Control System Firmware Storage STM32H7 Host MCU with FSMC parallel NAND interface בשימוש ב-: Industrial Control System Firmware Storage TPS62177 Automotive-grade 3.3V buck converter בשימוש ב-: Automotive Infotainment and Telematics i.MX8 NXP host SoC with parallel NAND controller בשימוש ב-: Automotive Infotainment and Telematics KSZ9031 Gigabit Ethernet PHY companion chip בשימוש ב-: Networking Equipment Boot and Configuration Storage AR9344 Qualcomm Atheros SoC with parallel NAND boot בשימוש ב-: Networking Equipment Boot and Configuration Storage MAX15066 Synchronous buck for 3.3V NAND rail בשימוש ב-: Embedded Linux File System Media AM3358 TI Sitara host MPU with GPMC NAND controller בשימוש ב-: Embedded Linux File System Media BCM7271 Broadcom STB SoC with NAND boot support בשימוש ב-: Set-Top Box and IoT Gateway Storage TPS54331 3.3V buck converter for NAND power rail בשימוש ב-: Set-Top Box and IoT Gateway Storage LPC4357 NXP Cortex-M4 host MCU with EMC NAND interface בשימוש ב-: Industrial Printer and Point-of-Sale Data Logging TPS62150 Step-down converter for 3.3V system rail בשימוש ב-: Industrial Printer and Point-of-Sale Data Logging
What is the memory density and organization of MX30LF1G18AC-TJ-TR?
The MX30LF1G18AC-TJ-TR provides 1 Gbit of storage organized as 128M x 8 (8-bit parallel I/O). According to the Macronix MX30LF1G18AC datasheet, this density is suitable for boot firmware, configuration data, and moderate-size file system media. The 8-bit bus width matches standard microcontroller DMA controllers and FPGA NAND interfaces.
What supply voltage does MX30LF1G18AC-TJ-TR require?
The MX30LF1G18AC-TJ-TR operates from a single 2.7V to 3.6V supply, making it directly compatible with 3.3V system rails common in industrial designs. VCCQ for the I/O drivers is internally generated. Designers must add a 0.1uF decoupling capacitor close to the VCC pin and a bulk 4.7uF to handle page-program inrush current.
What is the access time of MX30LF1G18AC-TJ-TR?
The MX30LF1G18AC-TJ-TR delivers a 20 ns asynchronous page read access time and a 25 us first-byte latency for cache read operations. This corresponds to an effective throughput of approximately 50 MB/s sequential read. The cache read feature shortens the next-page latency from tR (typical 25 us) to tRCBSY by overlapping the data register load with host data transfer.
Does MX30LF1G18AC-TJ-TR include an internal ECC engine?
No, the MX30LF1G18AC-TJ-TR does NOT include an internal ECC engine; it requires 4-bit ECC per 528-byte sector implemented in the host controller or FPGA. Designers typically use BCH(4,512) or Hamming(4,528) codes. The Macronix MX30LF1G18AC datasheet specifies ECC requirements in section 8; ignoring this requirement leads to data corruption within weeks of use.
What is the difference between MX30LF1G18AC-TJ-TR and MX30LF1G18AC-TJ?
The MX30LF1G18AC-TJ-TR is the tape-and-reel packaging variant of MX30LF1G18AC-TJ. Both share identical silicon die, pinout (48-pin TSOP-I), and electrical specifications. The -TR suffix only indicates the shipping format (T&R) versus the tray-format -TJ, and does not affect part performance. Choose -TR for high-volume SMT assembly and -TJ for prototype/low-volume builds.
What is the difference between MX30LF1G18AC and MX30LF1G28AD?
The MX30LF1G28AD is a 1 Gbit ONFI 2.x successor to MX30LF1G18AC with similar TSOP-48 pinout but enhanced features per Macronix application note AN-0660V2. According to the migration guide, both parts share compatible command sets but the new device supports higher throughput modes and improved ECC handling. The MX30LF1G18AC remains the active baseline for legacy designs.
Where can I buy MX30LF1G18AC-TJ-TR online?
The MX30LF1G18AC-TJ-TR is in stock at major distributors including DigiKey (per their product page) and Mouser (part #841-MX30LF1G18AC-TJ-TR). Pricing as of 2026-10-15 starts at $2.45 for qty 1 and drops to $1.48 at qty 1000. Lead time is typically 6-10 weeks from factory for production volumes, with distributor stock available for prototypes.
What is the price of MX30LF1G18AC-TJ-TR at qty 1000?
As of 2026-10-15, the MX30LF1G18AC-TJ-TR is priced at $1.48 per unit at the qty 1000 break. At qty 3000 (full reel), pricing drops to approximately $1.32 per unit. Volume pricing through Macronix authorized distributors can be negotiated lower for OEM contracts. Distributor stock is generally available for prototype quantities only.
What is the lead time for MX30LF1G18AC-TJ-TR?
According to the Macronix MX30LF1G18AC datasheet and current distributor inventory data, the MX30LF1G18AC-TJ-TR has a typical lead time of 8-12 weeks from the factory for production orders. Distributor stock (Mouser/DigiKey) is available immediately for small quantities, but design engineers should plan 12+ weeks ahead for high-volume builds.
MX30LF1G18AC-TJ-TR vs W25N01GVZEIG - which is better for embedded Linux?
The MX30LF1G18AC-TJ-TR is a parallel SLC NAND with 50 MB/s throughput, while the W25N01GVZEIG (Winbond) is a serial SPI NAND at lower throughput (~50 MB/s peak) but with simpler hardware interfacing. According to Macronix technical documentation, choose MX30LF1G18AC for designs requiring higher sustained throughput and parallel bus availability; choose W25N01GVZEIG when GPIO count is constrained and modest throughput suffices.
When should I choose MX30LF1G18AC-TJ-TR over MX30LF2G18AC-TJ?
Choose the MX30LF1G18AC-TJ-TR when 1 Gbit density is sufficient for the application, as it offers the same ONFI 1.0 feature set as the 2 Gbit MX30LF2G18AC-TJ at lower cost. The MX30LF2G18AC-TJ is better when 2 Gbit or larger is required. Both parts share the identical 48-pin TSOP-I footprint, enabling PCB layout reuse and drop-in upgrades when density needs grow.
Can I use MX30LF2G18AC-TJ as a drop-in replacement for MX30LF1G18AC-TJ-TR?
Yes, the MX30LF2G18AC-TJ is a drop-in replacement for MX30LF1G18AC-TJ-TR with the same 48-pin TSOP-I pinout and ONFI 1.0 interface. The only difference is 2 Gbit density vs 1 Gbit, which is software-handled via ONFI parameter page. This makes MX30LF2G18AC-TJ ideal for density upgrades when 1 Gbit proves insufficient in fielded designs.
Where can I download the MX30LF1G18AC-TJ-TR datasheet PDF?
The official Macronix MX30LF1G18AC datasheet PDF is available at https://www.macronix.com/Lists/Datasheet/Attachments/8443/MX30LF1G18AC,%203V,%201Gb,%20v1.0.pdf. The 73-page document (v1.0/v1.2 revisions) covers electrical characteristics, timing, command set, and bad-block management. Mirror copies are also available on Arrow Electronics and distributor websites.
What is the pinout of MX30LF1G18AC-TJ-TR?
The MX30LF1G18AC-TJ-TR uses the industry-standard 48-pin TSOP-I pinout with the WE# signal on pin 31 and I/O[7:0] on pins 29-36. Pin 38 carries the unique PT (Program Toggle) function that can be left floating if not needed. Refer to the Macronix MX30LF1G18AC datasheet page 10 for the complete pin description table; the pinout is shared with most ONFI 1.0 48-TSOP NAND devices.
Is the MX30LF1G18AC-TJ-TR RoHS compliant?
Yes, the MX30LF1G18AC-TJ-TR is RoHS compliant per Macronix product documentation. The part uses lead-free solder plating on the TSOP-48 pins and is rated for the standard 260C peak reflow profile (MSL-3, 168-hour floor life). For automotive qualification status, the -TJ suffix variant is the industrial-grade option; automotive grade requires the -XKJ package variant.

נתוני עזר הנדסיים עבור MX30LF1G18AC-TJ-TR — השוואה, הנחיות תכנון ומידע על תאימות.

מדריך בחירה

Choose the MX30LF1G18AC-TJ-TR when designing a 3.3V industrial or automotive-adjacent system that needs 1 Gbit of SLC NAND in a 48-pin TSOP-I package with ONFI 1.0 standard command support. Choose the MX30LF1G18AC-TJ (tray format) for prototype builds and the MX30LF1G18AC-TI for tray-format commercial-temperature designs. Upgrade to MX30LF2G18AC-TJ when 2 Gbit density is required; the part is pin-compatible and ONFI software-managed for easy migration. The MX30LF1G08AA is suitable only for legacy designs where ONFI compliance is not required; otherwise prefer the newer MX30LF1G18AC family for driver reuse and standard bad-block management.

השוואה עם חלופות

פרמטר מוצר זה MX30LF1G18AC-TJ MX30LF1G18AC-TI MX30LF2G18AC-TJ MX30LF1G08AA
Brand Macronix Macronix Macronix Macronix Macronix
Package 48-pin TSOP-I 48-pin TSOP-I - same 48-pin TSOP-I - same 48-pin TSOP-I - same 48-pin TSOP-I - same
Density 1 Gbit 1 Gbit 1 Gbit 2 Gbit 1 Gbit
Memory Type SLC NAND SLC NAND SLC NAND SLC NAND SLC NAND
Supply Voltage 2.7V to 3.6V 2.7V to 3.6V 2.7V to 3.6V 2.7V to 3.6V 2.7V to 3.6V
Access Time 20 ns 20 ns 20 ns 25 ns 50 ns
Operating Temperature -40C to +105C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
ONFI Compliance ONFI 1.0 ONFI 1.0 ONFI 1.0 ONFI 1.0 Pre-ONFI
Required ECC 4-bit / 528B 4-bit / 528B 4-bit / 528B 4-bit / 528B 1-bit / 256B

מבדילים עיקריים

  • Industrial temperature range with -TR tape and reel packaging (לעומתMX30LF1G18AC-TJ)
  • 1 Gbit density at lowest cost point in TSOP-48 form factor (לעומתMX30LF2G18AC-TJ)
  • Modern ONFI 1.0 compliance vs legacy command set (לעומתMX30LF1G08AA)

הערות תכנון

The MX30LF1G18AC-TJ-TR requires 4-bit ECC per 528-byte sector implemented in the host controller or FPGA; the device does not include an internal ECC engine. According to the Macronix MX30LF1G18AC datasheet, ignoring this requirement causes data corruption within weeks under normal write workloads. Use BCH(4,512) for typical Linux MTD subsystems. Always scan the factory-marked bad-block table at first power-up before deploying the device.

Add a 0.1uF X7R ceramic decoupling capacitor within 5mm of the VCC pin (pin 47) and a bulk 4.7uF capacitor to handle page-program inrush current (peak ~30 mA during program). The 48-pin TSOP-I package has multiple VSS pins (pins 23, 48); connect each directly to the ground plane with short traces. Use a 3.3V LDO or switching regulator with low ripple (<50 mVpp) to avoid corrupting program operations.

Route the 8-bit I/O bus (pins 29-30, 32-37) with matched trace lengths (delta <2 cm) to maintain signal integrity at 20 ns access times. Place a 0.1uF bypass capacitor on each VCC pin and route CLE, ALE, WE#, RE#, CE# signals with controlled impedance. The R/B# pin (pin 41) is open-drain and requires a 10k pull-up to VCC; if not used, leave it floating only if the host controller ignores the busy state.

מידע על תאימות

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Qualified
נטול עופרת
Yes
נטול הלוגנים
Yes
מינרלים של סכסוך
Compliant

RoHS and REACH compliant per Macronix product page. Standard MX30LF1G18AC is industrial-grade; automotive AEC-Q100 qualification requires the -XKJ package variant. MSL-3 rating applies (168-hour floor life).

הנתונים אומתו בתאריך: 2026-10-15 — נתונים אומתו ונערכו על ידי צוות הנדסת הרכיבים של XAIPART

חיפושים קשורים

MX30LF1G18AC-TJ-TR MX30LF1G18AC-TJ-TR datasheet Macronix 1Gbit SLC NAND TSOP-48 3V 1Gb NAND flash ONFI 1.0 MX30LF1G18AC vs MX30LF2G18AC industrial temperature NAND flash 105C MX30LF1G18AC-TJ-TR buy price SLC NAND 20ns access time parallel interface MX30LF1G18AC pinout TSOP-48 NAND flash boot medium embedded Linux MX30LF1G18AC-TJ-TR drop-in replacement what is 4-bit ECC NAND requirement

רכיבים ומונחים קשורים

Macronix MX30LF1G18AC MX30LF1G18AC-TJ-TR MX30LF1G18AC-TJ MX30LF1G18AC-TI MX30LF2G18AC-TJ MX30LF1G08AA SLC NAND NAND Flash non-volatile memory flash memory semiconductor memory IC ONFI 1.0 TSOP-48 TSOP-I package RoHS AEC-Q100 MSL-3 ECC BCH code industrial temperature automotive infotainment embedded Linux boot firmware parallel NAND interface
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