5CSXFC6C6U23C8NES vs 5CSXFC6C6U23C8N तुलना
विस्तृत दोनों ओर की तुलना 5CSXFC6C6U23C8NES द्वारा Intel और 5CSXFC6C6U23C8N द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
5CSXFC6C6U23C8N - Cyclone V SX SoC FPGA, 110K LE, ARM Cortex-A9 | Intel
5CSXFC6C6U23C8N ✓ सक्रियविशेषता तुलना
| पैरामीटर | 5CSXFC6C6U23C8NES | 5CSXFC6C6U23C8N |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | Cyclone V SX | Cyclone V SX (SoC FPGA) |
| Device Type | SoC FPGA (FPGA + ARM Cortex-A9 HPS) | — |
| Logic Elements | 110,000 | 110,000 |
| Hard Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Clock Frequency (max) | 600 MHz | — |
| Process Node | 28 nm TSMC low-power | — |
| Embedded Memory (M10K + MLAB) | 5,140 Kbits (approx) | — |
| DSP Blocks (18x19 multipliers) | 112 | — |
| User I/O Pins | 224 | — |
| पैकेज | 672-pin UBGА (23x23 mm) | 672-pin UFBGA (UBGA), 23x23 mm |
| Speed Grade | 8 (commercial) | C8 (commercial speed grade 8) |
| ऑपरेटिंग जंक्शन तापमान | 0C to +85C (commercial) | — |
| External Memory Interfaces | DDR2, DDR3, LPDDR2 | — |
| Hard PCIe Gen2 Controllers | 2 | — |
| माउंटिंग प्रकार | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS स्थिति | Compliant | Compliant |
| Series | — | Cyclone V SX |
| Architecture | — | MCU + FPGA (Hard Processor System + FPGA fabric) |
| Process Technology | — | 28 nm low-power (TSMC) |
| Core Voltage | — | 1.1 V |
| Hard Processor System (HPS) | — | Dual-core ARM Cortex-A9 MPCore with CoreSight |
| Processor Maximum Frequency | — | 600 MHz |
| HPS L1 Cache | — | 32 KB instruction + 32 KB data per core |
| HPS L2 Cache | — | 512 KB shared |
| DSP Blocks | — | Variable-precision DSP (number not specified in retrieved data) |
| Embedded Memory | — | M10K blocks (total Kbits [DATA_NEEDED: total embedded memory Kbits]) |
| Transceivers | — | Up to 3.125 Gbps integrated transceivers |
| Maximum User I/O | — | 145 user I/O (per DigChip summary; full count per package [DATA_NEEDED: package pinout max user I/O]) |
| Memory Controller | — | Hard controller supporting DDR2, DDR3, LPDDR2 |
| ऑपरेटिंग तापमान | — | -40C to +100C (industrial grade, code C) |
| MSL स्तर | — | 3 (per JEDEC J-STD-020, typical for large BGA) |
| Lead-Free / Halogen-Free | — | Yes (lead-free BGA; halogen status [DATA_NEEDED: halogen-free yes/no]) |
| Lifecycle | — | Active (Cyclone V family in production) |