5CSXFC6C6U23C8NES vs 5CSXFC6C6U23C8N 비교

다음의 상세 나란히 비교: 5CSXFC6C6U23C8NES 제조: Intel 및 5CSXFC6C6U23C8N 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 5CSXFC6C6U23C8NES 5CSXFC6C6U23C8N
브랜드 Intel Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 활성 활성
재고 상태 In Stock In Stock
단가 (USD) $195.00 $445.00
Family Cyclone V SX Cyclone V SX (SoC FPGA)
Device Type SoC FPGA (FPGA + ARM Cortex-A9 HPS) —
Logic Elements 110,000 110,000
Hard Processor Subsystem Dual ARM Cortex-A9 MPCore with CoreSight —
HPS Clock Frequency (max) 600 MHz —
Process Node 28 nm TSMC low-power —
Embedded Memory (M10K + MLAB) 5,140 Kbits (approx) —
DSP Blocks (18x19 multipliers) 112 —
User I/O Pins 224 —
패키지 672-pin UBGА (23x23 mm) 672-pin UFBGA (UBGA), 23x23 mm
Speed Grade 8 (commercial) C8 (commercial speed grade 8)
동작 접합 온도 0C to +85C (commercial) —
External Memory Interfaces DDR2, DDR3, LPDDR2 —
Hard PCIe Gen2 Controllers 2 —
실장 유형 Surface Mount (BGA) Surface Mount (BGA)
RoHS 상태 Compliant Compliant
Series — Cyclone V SX
Architecture — MCU + FPGA (Hard Processor System + FPGA fabric)
Process Technology — 28 nm low-power (TSMC)
Core Voltage — 1.1 V
Hard Processor System (HPS) — Dual-core ARM Cortex-A9 MPCore with CoreSight
Processor Maximum Frequency — 600 MHz
HPS L1 Cache — 32 KB instruction + 32 KB data per core
HPS L2 Cache — 512 KB shared
DSP Blocks — Variable-precision DSP (number not specified in retrieved data)
Embedded Memory — M10K blocks (total Kbits [DATA_NEEDED: total embedded memory Kbits])
Transceivers — Up to 3.125 Gbps integrated transceivers
Maximum User I/O — 145 user I/O (per DigChip summary; full count per package [DATA_NEEDED: package pinout max user I/O])
Memory Controller — Hard controller supporting DDR2, DDR3, LPDDR2
동작 온도 — -40C to +100C (industrial grade, code C)
MSL 레벨 — 3 (per JEDEC J-STD-020, typical for large BGA)
Lead-Free / Halogen-Free — Yes (lead-free BGA; halogen status [DATA_NEEDED: halogen-free yes/no])
Lifecycle — Active (Cyclone V family in production)

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