A3PE3000-1FGG896 vs A3PE3000L-FGG896M तुलना
विस्तृत दोनों ओर की तुलना A3PE3000-1FGG896 द्वारा Microchip Technology और A3PE3000L-FGG896M द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
A3PE3000-1FGG896 - ProASIC3E Flash FPGA 3M Gates 620 I/O | Microchip
A3PE3000-1FGG896 ✓ सक्रियMicrochip Technology
A3PE3000L-FGG896M - 3M-Gate Low-Power Flash FPGA | Microchip
A3PE3000L-FGG896M ✓ सक्रियविशेषता तुलना
| पैरामीटर | A3PE3000-1FGG896 | A3PE3000L-FGG896M |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | ProASIC3E (Flash FPGA) | ProASIC3L (Flash-based FPGA) |
| System Gates | 3,000,000 | 3,000,000 |
| Logic Cells | 75,264 | 75,264 |
| User I/O | 620 | — |
| Speed Grade | -1 | — |
| पैकेज | 896-ball FBGA (FGG896) | 896-ball FBGA (FGG896), 1 mm pitch |
| Technology | Nonvolatile flash, CMOS | — |
| Configuration | Single-chip, Instant On (on-chip flash) | Non-volatile flash, live-at-power-up Level 0, single-chip |
| Reprogrammability | Yes (in-system reprogrammable flash fabric) | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Core Voltage | [DATA_NEEDED: core voltage] | 1.2 V to 1.5 V |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | 0 to 70 C |
| Embedded Memory | [DATA_NEEDED: embedded block RAM capacity] | — |
| Lead Free | Yes (LEAD FREE per distributor listing) | — |
| RoHS स्थिति | Compliant | — |
| MSL स्तर | [DATA_NEEDED: moisture sensitivity level] | — |
| Country of Origin | South Korea (per MicrochipDirect for A3PE3000-1FG896 family variant) | — |
| User I/Os | — | Up to 616 (620 per DigiKey listing) |
| Embedded SRAM | — | 504 kbits true dual-port |
| Process Technology | — | 130-nm, 7-layer metal (6 copper), flash-based CMOS |
| सप्लाई वोल्टेज | — | 1.5 V |
| Logic Family | — | CMOS |
| Low-Power Feature | — | Flash*Freeze technology |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| Input Features | — | Schmitt trigger option on single-ended inputs; weak pull-up/pull-down |