A42MX24-2PLG84I vs A42MX09-2PLG84 तुलना
विस्तृत दोनों ओर की तुलना A42MX24-2PLG84I द्वारा Microchip Technology और A42MX09-2PLG84 द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
A42MX24-2PLG84I - 36K Gate Antifuse FPGA, 84-PLCC | Microchip
A42MX24-2PLG84I ✓ सक्रियविशेषता तुलना
| पैरामीटर | A42MX24-2PLG84I | A42MX09-2PLG84 |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | MX (42MX) | 42MX (MX FPGA) |
| System Gates | 36000 gates | 14000 |
| Logic Cells | 912 cells | 336 |
| User I/O | 72 | 72 |
| Technology | 0.45 um antifuse | 0.45 um antifuse |
| Core Architecture Voltage | 5.0 V | — |
| I/O Voltage Support | 3.3 V / 5.0 V mixed | — |
| Speed Grade | -2 | -2 |
| Programmability | One-Time Programmable (antifuse) | — |
| ऑपरेटिंग तापमान | -40C to +85C (Industrial) | [DATA_NEEDED: operating temperature range] |
| पैकेज | 84-PLCC (J-Lead) | 84-LCC (J-Lead) / PLCC-84 |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Configuration | No external boot device required | — |
| Dedicated Decode Blocks | D-modules (wide-input AND, CPLD-like) | — |
| RoHS स्थिति | Lead Free (per Kynix listing) | [DATA_NEEDED: RoHS status] |
| Packaging | Tray | — |
| Primary Applications | ASIC alternative, legacy PLD integration | — |
| Clock-to-Out | — | 5.6 ns |
| Internal Performance | — | up to 250 MHz (161 MHz / 269 MHz grade limits per FindIC) |
| Dual-Port SRAM | — | up to 2.5 kbits (family max), 5 ns access |
| FIFO Performance | — | 100 MHz (family) |
| Core Voltage | — | 3.3 V to 5 V (dual voltage, 0.45 um technology) |
| Supply Voltage Range | — | 3.0 V to 3.6 V and 4.5 V to 5.5 V |
| Programming Type | — | One-Time Programmable (antifuse), non-volatile |