ADS62P15IRGC25 vs ADS62P48IRGC25 तुलना
विस्तृत दोनों ओर की तुलना ADS62P15IRGC25 द्वारा Texas Instruments और ADS62P48IRGC25 द्वारा Texas Instruments. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Texas Instruments
ADS62P15IRGC25 - Dual 11-Bit 125MSPS ADC | Texas Instruments
ADS62P15IRGC25 ✓ सक्रियTexas Instruments
ADS62P48IRGC25 - Dual 14-Bit 210MSPS ADC | Texas Instruments
ADS62P48IRGC25 ✓ सक्रियविशेषता तुलना
| पैरामीटर | ADS62P15IRGC25 | ADS62P48IRGC25 |
|---|---|---|
| ब्रांड | Texas Instruments | Texas Instruments |
| श्रेणी | ADC/DAC | ADC/DAC |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| रेज़ोल्यूशन | 11 bit | 14 bit |
| Number of Channels | 2 (dual, simultaneous sampling) | 2 (Dual) |
| Sampling Rate (max) | 125 MSPS per channel | — |
| Architecture | Pipelined | Pipelined |
| Input Type | Differential analog inputs | Differential analog inputs |
| Output Interface | Parallel CMOS or DDR LVDS (selectable) | DDR LVDS / Parallel CMOS (selectable) |
| Reference | Internal (external reference supported) | — |
| पैकेज | 64-VQFN (9x9 mm, RGC) with thermal pad | — |
| ऑपरेटिंग तापमान रेंज | -40 C to +85 C (industrial) | -40 C to +85 C (Industrial) |
| Supply Voltage (AVDD) | 3.3 V (typical) | — |
| Supply Voltage (DRVDD) | 1.8 V to 3.3 V (interface-dependent) | — |
| SNR (typical) | [DATA_NEEDED: SNR dBFS] | — |
| SFDR (typical) | [DATA_NEEDED: SFDR dBc] | — |
| ENOB (typical) | [DATA_NEEDED: ENOB bits] | — |
| Input Bandwidth | [DATA_NEEDED: analog input bandwidth MHz] | — |
| Power Dissipation | [DATA_NEEDED: power per channel mW] | — |
| Configuration Interface | Serial (SPI-compatible) | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| RoHS स्थिति | Compliant | Compliant |
| MSL स्तर | 3 | 3 |
| Sample Rate (max) | — | 210 MSPS |
| Analog Supply Voltage | — | 1.8 V |
| Digital Supply Voltage | — | 3.3 V |
| पैकेज / केस | — | 64-VQFN (RGC) 9x9 mm (HVQCCN) |
| पिन काउंट | — | 64 |
| Lead Free | — | Yes |
| Input Clock Type | — | LVDS differential clock |
| Internal Dither | — | Yes (programmable) |
| Programmable Gain | — | Yes (improves SFDR at lower FS inputs) |