EP1M120F484I6M vs EP1M120F484I6 तुलना
विस्तृत दोनों ओर की तुलना EP1M120F484I6M द्वारा Altera और EP1M120F484I6 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP1M120F484I6M | EP1M120F484I6 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | NRND | Obsolete |
| Family | Mercury (EP1M) | Altera / Intel Mercury programmable logic device (PLD) |
| Logic Elements | 120,000 | 49,152 |
| System Gates | 480,000 (typical) | — |
| LABs / CLBs | 303 | — |
| Flip-Flops | 49,152 | — |
| Embedded Memory (Bits) | 4,800 Kb (480 Kbits) | — |
| Package Type | 484-Ball FCBGA | 484-BBGA, FCBGA (FineLine BGA) |
| Package Code | BGA, 484 balls, Fine-pitch | — |
| Package Shape | Square | — |
| Terminal Form | Ball | — |
| Temperature Grade | Industrial | — |
| Speed Grade | -6 (slowest Mercury timing bin) | -6 |
| सप्लाई वोल्टेज | 1.5 V core / 3.3 V aux (per Mercury datasheet) | — |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS | — |
| Clock Management | PLLs (per Mercury family) | — |
| Boundary-Scan | IEEE 1149.1 / JTAG | — |
| RoHS स्थिति | Compliant (M revision) | [DATA_NEEDED: RoHS status not specified in verified data] |
| Series | — | Mercury (EP1M) |
| Memory Bits | — | 4,800 (480 Kbits) |
| Number of LABs/CLBs | — | 480 |
| User I/Os | — | 303 |
| Number of Gates | — | [DATA_NEEDED: nominal gate count] |
| Core Supply Voltage | — | 1.8 V |
| ऑपरेटिंग तापमान | — | 0C to +85C (Industrial) |
| Pins / Balls | — | 484 |
| Logic Family | — | CMOS |
| High-Speed Transceivers | — | Integrated CDR-based, up to 1.25 Gbps |
| Transceiver Channels (1.25 Gbps) | — | Up to 4 channels on EP1M120 (EP1M350 up to 8) |
| Design Tool | — | Altera Quartus II |
| माउंटिंग प्रकार | — | Surface Mount (BGA) |