EP20K30EFC144-3 vs EP20K30EFC144-2X तुलना
विस्तृत दोनों ओर की तुलना EP20K30EFC144-3 द्वारा Altera और EP20K30EFC144-2X द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP20K30EFC144-3 | EP20K30EFC144-2X |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Series | APEX-20K | — |
| Family | APEX-20K FPGA | — |
| Logic Elements / Cells | 1200 | — |
| Total System Gates | 30,000 (typical) | — |
| Total RAM Bits | 24576 | — |
| Number of User I/Os (per pkg) | 92 (144-LQFP) | — |
| User I/Os (max per family) | 408 | — |
| Internal Operating Frequency | 160 MHz | — |
| Propagation Delay | 1.68 ns (typical) | — |
| Logic Family | CMOS | — |
| Process Technology | 0.22 um | 0.22 um |
| Core Supply Voltage | 1.71 V to 1.89 V | 1.8 V |
| Architecture | MultiCore (LUT + product-term + ESB) | — |
| पैकेज / केस | 144-LQFP (20x20 mm) | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| ऑपरेटिंग तापमान | 0C to +85C | — |
| Speed Grade | -3 | -2X |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | unknown |
| Development Tool (legacy) | Quartus II / MAX+PLUS II | — |
| Device Family | — | Altera APEX 20K |
| Device Type | — | Loadable programmable logic device (FPGA/CPLD hybrid) |
| Typical Gates | — | 30,000 gates |
| Number of Logic Elements / Cells | — | 1,200 cells (third-party parametric listing) |
| Number of Macrocells | — | 192 |
| Number of User I/O | — | 93 |
| Number of Terminals | — | 144 |
| Terminal Form | — | Ball |
| Package Code | — | LBGA / 144-FBGA |
| Package Shape | — | Square |
| ऑपरेटिंग तापमान रेंज | — | [DATA_NEEDED: exact operating temperature range] |
| Embedded RAM Bits | — | [DATA_NEEDED: embedded memory size] |
| Supported I/O Standards | — | [DATA_NEEDED: supported I/O standards] |
| Configuration Schemes | — | [DATA_NEEDED: supported configuration schemes] |