EP20K60EFC144-1 vs EP20K60EFC144-2 तुलना
विस्तृत दोनों ओर की तुलना EP20K60EFC144-1 द्वारा Altera और EP20K60EFC144-2 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP20K60EFC144-1 | EP20K60EFC144-2 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Device Family | APEX 20KE | — |
| Series | APEX 20K | APEX-20K |
| Logic Family | CMOS | — |
| Typical Gates | 60,000 | 60,000 |
| Maximum System Gates | 256,000 | — |
| Macrocells | 256 | — |
| Maximum User I/Os | 93 (per datasheet; 196 max in 144-FBGA family datasheet) | — |
| Embedded Memory | 32,768 bits (2560 RAM blocks) | — |
| Maximum Internal Frequency | 160 MHz | — |
| Propagation Delay | 1.72 ns | 1.72 ns |
| Core Supply Voltage | 1.8 V | 1.71 V to 1.89 V |
| Speed Grade | -1 | — |
| ऑपरेटिंग तापमान | 0 C to 85 C (Commercial) | 0 °C to +85 °C (commercial) |
| पैकेज | 144-FBGA (Fine-pitch BGA) | 144-LQFP (also referenced as 144-FBGA 13x13 in some sources) |
| Package Pin Count | 144 balls | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| RoHS स्थिति | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS status] |
| Programming Interface | JTAG / ByteBlaster / Altera Programming Unit | — |
| Family | — | APEX-20KE (Enhanced, 1.8 V core) |
| Logic Elements | — | 2,560 |
| Total RAM Bits | — | 32,768 |
| User I/O | — | 92 to 93 |
| Internal Frequency (max) | — | 160 MHz |
| Process Technology | — | 0.18 µm CMOS |
| JTAG Support | — | IEEE 1149.1 boundary scan |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+ |
| Configuration Method | — | Serial/Parallel passive, JTAG, EPC companion |