EP20K60EFC144-1 vs EP20K60EFC144-2 비교
다음의 상세 나란히 비교: EP20K60EFC144-1 제조: Altera 및 EP20K60EFC144-2 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP20K60EFC144-1 | EP20K60EFC144-2 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $19.40 | $12.75 |
| Device Family | APEX 20KE | — |
| Series | APEX 20K | APEX-20K |
| Logic Family | CMOS | — |
| Typical Gates | 60,000 | 60,000 |
| Maximum System Gates | 256,000 | — |
| Macrocells | 256 | — |
| Maximum User I/Os | 93 (per datasheet; 196 max in 144-FBGA family datasheet) | — |
| Embedded Memory | 32,768 bits (2560 RAM blocks) | — |
| Maximum Internal Frequency | 160 MHz | — |
| Propagation Delay | 1.72 ns | 1.72 ns |
| Core Supply Voltage | 1.8 V | 1.71 V to 1.89 V |
| Speed Grade | -1 | — |
| 동작 온도 | 0 C to 85 C (Commercial) | 0 °C to +85 °C (commercial) |
| 패키지 | 144-FBGA (Fine-pitch BGA) | 144-LQFP (also referenced as 144-FBGA 13x13 in some sources) |
| Package Pin Count | 144 balls | — |
| 실장 유형 | Surface Mount | Surface Mount |
| RoHS 상태 | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS status] |
| Programming Interface | JTAG / ByteBlaster / Altera Programming Unit | — |
| Family | — | APEX-20KE (Enhanced, 1.8 V core) |
| Logic Elements | — | 2,560 |
| Total RAM Bits | — | 32,768 |
| User I/O | — | 92 to 93 |
| Internal Frequency (max) | — | 160 MHz |
| Process Technology | — | 0.18 µm CMOS |
| JTAG Support | — | IEEE 1149.1 boundary scan |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+ |
| Configuration Method | — | Serial/Parallel passive, JTAG, EPC companion |