EP2A40F1020C8 vs EP2A40F1020C6 तुलना
विस्तृत दोनों ओर की तुलना EP2A40F1020C8 द्वारा Intel और EP2A40F1020C6 द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EP2A40F1020C8 | EP2A40F1020C6 |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | NRND | Obsolete |
| Family | APEX II | APEX II |
| Logic Family | CMOS | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.15 µm CMOS |
| System Gates | 1,500,000 | — |
| Logic Cells | 38,400 | — |
| Macros / Macro Cells | 2,560 | — |
| Embedded RAM | [DATA_NEEDED: total ESB bits] | — |
| Maximum Internal Frequency | 376 MHz | — |
| Propagation Delay | 1.55 ns | — |
| User I/O Pins | 735 | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V | — |
| Package Type | FC-FBGA (FineLine BGA) | — |
| Package Pin Count | 1020 | — |
| Package Dimensions | 33 x 33 mm | — |
| Ball Pitch | 1.0 mm | — |
| ऑपरेटिंग तापमान | 0 C to +85 C (commercial, 'C' suffix) | — |
| RoHS स्थिति | [DATA_NEEDED: confirm per lot] | [DATA_NEEDED: RoHS status] |
| Configuration Interface | JTAG / Altera serial | Passive Serial, Passive Parallel, Passive Asynchronous, JTAG (IEEE 1149.1) |
| Design Toolchain | Quartus II (legacy version 4.x or earlier recommended) | — |
| Maximum System Gates | — | 1,600,000 |
| Typical Gates | — | 40,000 |
| Logic Elements | — | [DATA_NEEDED: exact LE count] |
| Embedded System Bits | — | 655,360 bits |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Number of PLLs | — | 4 |
| Core Supply Voltage | — | 1.8 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| पैकेज | — | FBGA-1020 |
| In-System Programmability | — | Yes |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |