EP3SE260H780C3N vs EP3SE260H780C4LN तुलना
विस्तृत दोनों ओर की तुलना EP3SE260H780C3N द्वारा Intel और EP3SE260H780C4LN द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
EP3SE260H780C3N - Stratix III E FPGA, 255K LE, 780-BGA | Intel / Altera
EP3SE260H780C3N ✓ सक्रियविशेषता तुलना
| पैरामीटर | EP3SE260H780C3N | EP3SE260H780C4LN |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | अंतिम बार खरीदें |
| Series | Stratix® III E | — |
| Logic Elements (LE) | 255,000 | — |
| Embedded Memory (bits) | 16,672,768 | — |
| Number of LABs/CLBs | 10,200 | — |
| User I/Os | 488 | — |
| Number of Pins / Balls | 780 | — |
| पैकेज | 780-BBGA, FCBGA (H780) | 780-ball FCBGA (FineLine BGA) |
| माउंटिंग प्रकार | Surface Mount | — |
| ऑपरेटिंग तापमान | 0 °C to +85 °C (C grade, commercial) | 0C to +85C (commercial) |
| Process Technology | 40 nm CMOS | — |
| Maximum Core Frequency | [DATA_NEEDED: maximum core frequency MHz] | — |
| Supply Voltage (VCCINT) | [DATA_NEEDED: VCCINT nominal V] | — |
| Transceivers | [DATA_NEEDED: number of embedded transceivers and max data rate] | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks and precision] | — |
| RoHS स्थिति | Compliant (lead-free 'N' suffix) | Compliant |
| नमी संवेदनशीलता स्तर (MSL) | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | — |
| Configuration Method | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel | — |
| Design Toolchain | Altera Quartus II (legacy); Intel Quartus Prime | — |
| Family | — | Stratix III E |
| Logic Elements | — | 255,000 |
| Embedded Memory | — | 16,672,768 bits (16.67 Mbit) |
| Logic Array Blocks (LABs) | — | 10,200 |
| Embedded Multipliers (18x18) | — | 384 |
| User I/O Count | — | 488 |
| Speed Grade | — | C4 (commercial, moderate speed) |
| Core Voltage (VCC) | — | 1.0 V |
| I/O Voltage (VCCIO) | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| Auxiliary Voltage (VCCPD/VCCPT) | — | 2.5 V / 3.0 V |
| PLLs | — | 8 |
| Global Clock Networks | — | 16 |
| Process Node | — | 40 nm TSMC |
| Configuration Modes | — | FPP, AS, PS, JTAG |
| MSL स्तर | — | 3 (168 hours) |