EP610PC-35 vs EP610DC-35 तुलना
विस्तृत दोनों ओर की तुलना EP610PC-35 द्वारा Rochester Electronics और EP610DC-35 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Rochester Electronics
EP610PC-35 - 16-Macrocell Classic EPLD, 35ns tPD | Rochester
EP610PC-35 ✓ सक्रियविशेषता तुलना
| पैरामीटर | EP610PC-35 | EP610DC-35 |
|---|---|---|
| ब्रांड | Rochester Electronics | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | NRND |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD - Classic EPLD |
| Family | Classic EPLD | Altera Classic EP610 |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 37 ns (max, -35 speed grade) | 35 ns |
| Internal Counter Frequency | up to 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V |
| Supply Voltage - Internal | 4.75 V to 5.25 V | — |
| ऑपरेटिंग तापमान | 0C to +70C (commercial) | 0C to +70C (commercial) [DATA_NEEDED: explicit range from datasheet] |
| Programmable Type | EPLD (UV-erasable window variant: EP610DC; plastic OTP) | — |
| पैकेज | 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) | 24-pin CDIP (windowed CERDIP) 0.300 inch |
| माउंटिंग प्रकार | Through Hole | Through-Hole (DIP) |
| Supplier Device Package | 24-PDIP | — |
| Logic Family | CMOS | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status - not confirmed in provided data] | [DATA_NEEDED: not explicitly confirmed in retrieved data; CERDIP packages typically non-RoHS] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL स्तर | [DATA_NEEDED: MSL level] | — |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Pipelined Data Rate | — | up to 100 MHz |
| Process Technology | — | CMOS |
| Program/erase Method | — | UV-erasable (windowed CERDIP) |
| Manufacturer | — | Originally Altera; today supplied via Rochester Electronics (authorized) |