EP910JC-30 vs EP910LC-40 तुलना
विस्तृत दोनों ओर की तुलना EP910JC-30 द्वारा Intel और EP910LC-40 द्वारा Rochester Electronics. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 Obsoleteविशेषता तुलना
| पैरामीटर | EP910JC-30 | EP910LC-40 |
|---|---|---|
| ब्रांड | Intel | Rochester Electronics |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | Classic EPLD (MAX-style) | — |
| Propagation Delay (tpd) | 30 ns | — |
| Maximum Internal Frequency (Fmax) | 33.3 MHz | — |
| Macrocells | 24 | 24 |
| Inputs | 36 | — |
| Product Terms | 240 | — |
| Outputs | 10 dedicated | — |
| Supply Voltage (Vcc) | 5 V | — |
| Technology | CMOS EPROM, UV-erasable | CMOS EPROM |
| पैकेज | 44-pin Windowed Ceramic J-Lead Chip Carrier (CQCC-44 / JLCC-44) | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | — |
| Supply Current (Icc) | [DATA_NEEDED: Icc typical / maximum] | — |
| माउंटिंग प्रकार | Surface Mount (socket-mountable) | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance] | Not applicable (legacy) |
| Logic Blocks | 24 macrocells (AND/OR array architecture) | — |
| Manufacturer | — | Rochester Electronics (Altera original) |
| Device Family | — | Altera Classic EPLD - EP910 |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Logic Array Blocks | — | 2 (12 macrocells each) |
| Propagation Delay (tPD) | — | 40 ns |
| Maximum Toggle Frequency (fMAX) | — | 25 MHz |
| User I/O Pins | — | 36 |
| Dedicated Inputs | — | 4 |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| Programming Method | — | Altera Logic Programmer (PLAD-J), 4-wire serial |
| Lead-Free Status | — | Not applicable |