EPC1213LC20 vs EPC1064LC20 तुलना
विस्तृत दोनों ओर की तुलना EPC1213LC20 द्वारा Intel और EPC1064LC20 द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPC1213LC20 | EPC1064LC20 |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | EEPROM | Memory ICs |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| मेमोरी प्रकार | OTP Configuration PROM (Flash-based) | OTP Configuration PROM (Flash-based, one-time programmable) |
| मेमोरी आकार | 212 Kbit | 65 kb (65,536 bits) |
| इंटरफ़ेस | Serial (Altera FPGA configuration protocol) | Serial (Passive Serial / daisy-chain compatible) |
| Maximum Configuration Clock | 6 MHz | — |
| Supply Voltage (Core) | 5.0 V | — |
| I/O Voltage Tolerance | 3.3 V / 5.0 V | — |
| Programmability | One-Time Programmable (OTP) via IEEE 1149.1 JTAG | — |
| In-System Programmability | Yes (5.0 V and 3.3 V ISP) | — |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Compression Support | Yes (FPGA decompresses bitstream during load) | — |
| ऑपरेटिंग तापमान | 0C to +70C (Commercial) | 0 C to 70 C (Commercial) |
| पैकेज | 20-PLCC (J-lead, 9x9 mm) | — |
| Package Code | QCCJ | QCCJ (PLCC-20 J-lead) |
| माउंटिंग प्रकार | Surface Mount | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance status] | Non-compliant (Sn/Pb finish) |
| Programmable Type | — | OTP (One-Time Programmable) |
| Access Time | — | 90 ns (approximately 10 MHz) |
| Supply Voltage (Operating) | — | 4.5 V to 5.5 V |
| Supply Voltage (Nominal) | — | 5 V |
| पैकेज / केस | — | 20-PLCC (LC) J-lead, 9x9 mm |
| No. of Terminals | — | 20 |
| Terminal Finish | — | Tin/Lead (Sn/Pb) |
| Package Shape | — | Square |
| Compatible Altera FPGA Families | — | ACEX 1K, APEX 20K, APEX II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Configuration Modes Supported | — | Passive Serial (PS) with FPP up to 100 MHz on newer FPGAs |
| MSL स्तर | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | No (Sn/Pb terminal finish) |