EPM5128GC vs EPM5064JC-1 तुलना

विस्तृत दोनों ओर की तुलना EPM5128GC द्वारा Altera और EPM5064JC-1 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。

विशेषता तुलना

पैरामीटर EPM5128GC EPM5064JC-1
ब्रांड Altera Altera
श्रेणी FPGA & CPLD FPGA & CPLD
लाइफसाइकिल स्थिति Obsolete NRND
Family MAX 5000 MAX 5000
Macrocells 128 —
Usable Gates 2,500 1250 (typical)
Logic Elements / LABs [DATA_NEEDED: LAB count] —
User I/Os 68 —
Package Type WPGA (Windowed Ceramic Pin Grid Array) —
Package Code WPGA —
Number of Terminals 68 —
Terminal Form PIN/PEG (through-hole PGA with alignment pegs) —
Package Shape Square —
Temperature Grade Commercial —
Supply Voltage (Vcc) 5 V —
Process Technology CMOS, UV-erasable 0.8 µm CMOS
Architecture EPLD, programmable AND/OR array with fixed OR plane —
Propagation Delay (tpd) [DATA_NEEDED: tpd in ns] —
Maximum Frequency (fmax) [DATA_NEEDED: fmax in MHz] —
Programmable Security Bit Yes —
Configuration Memory Non-volatile UV-EPROM (windowed ceramic) —
माउंटिंग प्रकार Through-Hole (PGA socket required) Surface Mount (PLCC socket recommended)
RoHS स्थिति [DATA_NEEDED: RoHS compliance] Non-compliant (windowed ceramic, contains Pb in glass frit)
Device Type — EPLD (Erasable Programmable Logic Device)
Macro Cells — 64
Logic Elements — 128 (Logic Array Blocks)
Maximum Operating Frequency — 33.3 MHz (fCNT)
Pin-to-Pin Delay (tPD) — [DATA_NEEDED: tPD typical/max in ns]
Supply Voltage (VCC) — 5 V nominal (4.75 V – 5.25 V)
Programmable Pins — 36 (typical I/O, 44-pin PLCC)
Dedicated Inputs — [DATA_NEEDED: dedicated input count]
पैकेज — 44-pin PLCC (J-lead, windowed ceramic)
ऑपरेटिंग तापमान — 0 °C to +70 °C (commercial, -JC suffix)
Erasure Method — UV-erasable through quartz window
Programming Method — Altera Logic Programmer + MasterBlaster/ByteBlasterMV
JTAG Boundary Scan — Not supported (classic MAX architecture)
Military/Avionics SMD — 5962-01-417-3750 (QML variant: EPM5064JM/883)

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