EPM5128JC-2 vs EPM5128JI तुलना
विस्तृत दोनों ओर की तुलना EPM5128JC-2 द्वारा Altera और EPM5128JI द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPM5128JC-2 | EPM5128JI |
|---|---|---|
| ब्रांड | Altera | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | UV-Erasable Programmable Logic Device (PLD) | UV-erasable programmable logic device (PLD) |
| Macrocells | 128 | 128 |
| Dedicated Inputs | 7 | — |
| Propagation Delay (tPD) | 45 ns (max) | 55 ns (typical) |
| Maximum Counter Frequency (fCNT) | 50 MHz | — |
| Input Setup Time (tSU) | 7.5 ns | — |
| Output Drive Current (IOH/IOL) | 12 mA DC | — |
| Process Technology | CMOS | CMOS |
| पैकेज | 68-pin CQCC (Ceramic Quad Flat Pack), windowed | 68-terminal ceramic CQCC, windowed, J-leads |
| माउंटिंग प्रकार | Surface Mount | Surface Mount (J-lead CQCC) |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | — |
| सप्लाई वोल्टेज | 5 V (nominal) | [DATA_NEEDED: VCC range] |
| Program/Erase Method | UV (ceramic window) | — |
| Erase/Program Cycles | [DATA_NEEDED: minimum erase/program cycles] | — |
| RoHS स्थिति | Non-compliant (ceramic windowed package contains lead-bearing solder) | Non-compliant (ceramic hermetic package) |
| Logic Family | TTL-compatible I/O | — |
| Device Family | — | MAX 5000 |
| Maximum Internal Frequency | — | 40 MHz |
| Programmable Technology | — | UV-erasable EPROM cell |
| Operating Temperature Grade | — | Industrial ("I" suffix) |
| Programming | — | Altera MAX+plus II compatible programmer + UV eraser |
| Lead Finish | — | Tin-lead (SnPb) over nickel |
| Logic Blocks | — | [DATA_NEEDED: number of LABs / logic array blocks] |
| User I/O Pins | — | [DATA_NEEDED: pin count of user I/Os] |
| Standby Current | — | [DATA_NEEDED: ICCSB] |