EPM5192JI-1 vs EPM5192JC तुलना
विस्तृत दोनों ओर की तुलना EPM5192JI-1 द्वारा Intel और EPM5192JC द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPM5192JI-1 | EPM5192JC |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | CMOS UV-Erasable Programmable Logic Device (PLD / EPLD) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | — |
| Process Technology | CMOS EPROM | CMOS EPROM (UV-erasable) |
| पैकेज | 84-pin JLCC (Windowed ceramic J-lead) | 68-pin PLCC (JC) windowed ceramic |
| ऑपरेटिंग तापमान | Industrial, -40 C to +85 C | [DATA_NEEDED: commercial / industrial / military grade] |
| Configuration Memory | UV-erasable EPROM | — |
| Programming Method | External EPROM programmer (via programming hardware) | UV-erase + EPROM programmer |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: original Altera marking not RoHS] |
| Speed Grade | -1 (slowest grade in EPM5192 family) | — |
| Logic Element per Macrocell | 1 D flip-flop + AND/OR array | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Series | — | EPM5192 (Classic / MAX-class) |
| Interconnect Architecture | — | Programmable Interconnect Array (PIA) |
| माउंटिंग प्रकार | — | Surface Mount |
| Non-Volatile Configuration | — | Yes (EPROM cell array) |
| Logic Family | — | Classic CPLD (EPM5xxx series) |
| सप्लाई वोल्टेज | — | [DATA_NEEDED: VCC nominal] |
| Propagation Delay | — | [DATA_NEEDED: tpd spec by speed grade] |