EPM5192LC-45 vs EPM5192LC-2 तुलना
विस्तृत दोनों ओर की तुलना EPM5192LC-45 द्वारा Altera और EPM5192LC-2 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPM5192LC-45 | EPM5192LC-2 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Series | EPM5192 | — |
| Macrocells | 192 | 192 |
| Logic Elements | 192 macrocells | — |
| Maximum Operating Frequency | 100 MHz | — |
| Pin-to-Pin Delay (tPD) | 45 ns | — |
| Dedicated Inputs | [DATA_NEEDED: dedicated input count] | — |
| Programmable I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Configuration Memory | UV-erasable EPROM / OTP | — |
| Technology | EPROM-based CMOS | — |
| Package Type | LCC (Leaded Ceramic Chip Carrier) with UV window | — |
| Package Code | LC | — |
| Speed Grade | -45 (45 ns tPD) | — |
| ऑपरेटिंग तापमान | 0C to +70C (commercial) | [DATA_NEEDED: commercial/industrial/military grade] |
| सप्लाई वोल्टेज | 5 V | 5 V (typical MAX 5000 family) |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] |
| माउंटिंग प्रकार | Surface Mount (LCC) | — |
| Datasheet Page Count | 52 pages | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 12 |
| User I/O Pins | — | 64 |
| Dedicated Input Pins | — | 7 |
| External Clock Inputs | — | 1 |
| Propagation Delay (tPD) | — | 45 ns (typical, -2 speed grade) |
| Maximum Internal Frequency | — | 50 MHz |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Process Technology | — | CMOS |
| पैकेज | — | PQCC-84 (PLCC-84, J-lead, surface mount) |
| Programming | — | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) |