EPM9560RC208-15 vs EPM9560RC208-10 तुलना
विस्तृत दोनों ओर की तुलना EPM9560RC208-15 द्वारा Altera और EPM9560RC208-10 द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPM9560RC208-15 | EPM9560RC208-10 |
|---|---|---|
| ब्रांड | Altera | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 gates | 12,000 |
| Macro Cells | 560 macro cells | — |
| Pin-to-Pin Delay | 15 ns | — |
| Counter Speed | 117.6 MHz | — |
| सप्लाई वोल्टेज | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| पैकेज | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Plastic Quad Flat Pack) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| Number of I/O Pins | [DATA_NEEDED: number of I/O pins] | — |
| Logic Array Blocks | [DATA_NEEDED: number of logic array blocks] | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not stated in retrieved distributor listings] |
| Speed Grade | -15 (15 ns pin-to-pin) | — |
| Architecture | Third-generation Multiple Array MatriX (MAX) | — |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 (208-pin package variant) |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: internal toggle frequency in MHz] |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standards Supported | — | 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) |
| Configuration Memory | — | EEPROM (in-system programmable via JTAG) |
| Process Technology | — | 0.30 µm CMOS EEPROM |
| Lead-Free | — | [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] |
| Programmability | — | JTAG (IEEE 1149.1) in-system programming |