RTAX1000SL-CQ352V vs RTAX2000DL-CQ352B तुलना
विस्तृत दोनों ओर की तुलना RTAX1000SL-CQ352V द्वारा Microchip Technology और RTAX2000DL-CQ352B द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
RTAX1000SL-CQ352V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-CQ352V ✓ सक्रियMicrochip Technology
RTAX2000DL-CQ352B - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000DL-CQ352B ✓ सक्रियविशेषता तुलना
| पैरामीटर | RTAX1000SL-CQ352V | RTAX2000DL-CQ352B |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | RTAX-SL (RTAX-S/SL Radiation-Tolerant FPGAs) | — |
| Equivalent System Gates | 1,000,000 | 2,000,000 |
| CLBs (Logic Modules) | 12,096 | — |
| Logic Cells | 18,144 | [DATA_NEEDED: Logic Cells] |
| Maximum Toggle Frequency | 581 MHz | — |
| Process Technology | 0.15 um CMOS | — |
| Core Voltage | 1.5 V | — |
| Programming Technology | Antifuse (one-time programmable) | Nonvolatile antifuse |
| Radiation Tolerance | Radiation-tolerant, space-flight qualified family | — |
| Power-Up Behavior | Live at power-up (non-volatile) | — |
| Configuration Upset Immunity | No SEU in configuration memory (antifuse) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Up to 540 kbits with optional EDAC protection |
| पैकेज | 352-pin Ceramic CQFP (CQ352V) | 352-terminal ceramic CQFP, metal-sealed |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: Operating Temperature Range] |
| I/O Voltage | [DATA_NEEDED: I/O bank voltage range] | — |
| Total Ionizing Dose (TID) | [DATA_NEEDED: TID rating in krad (Si)] | — |
| MSL स्तर | [DATA_NEEDED: moisture sensitivity level] | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS compliance status] | — |
| Estimated Equivalent Gates per CLB | [DATA_NEEDED: gates-per-CLB ratio] | — |
| CLBs | — | 19,712 |
| DSP Mathblocks | — | Up to 120 |
| DSP MAC Performance | — | 125 MHz, 18-bit x 18-bit multiply-accumulate |
| Total Ionizing Dose (Functional) | — | 300 krad (Si) |
| Total Ionizing Dose (Parameter) | — | 200 krad (Si) |
| Core Supply Voltage (Nominal) | — | 1.5 V |
| Core Supply Voltage Range | — | 1.425 V to 1.575 V |
| Terminal Pitch | — | 0.500 mm |
| Configuration | — | Live at power-up, no external boot PROM required |
| Application Domain | — | Space flight systems |