RTAX2000DL-CQ352E vs RTAX2000DL-CQ352V तुलना
विस्तृत दोनों ओर की तुलना RTAX2000DL-CQ352E द्वारा Microchip Technology और RTAX2000DL-CQ352V द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
RTAX2000DL-CQ352E - 2M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX2000DL-CQ352E ✓ सक्रियMicrochip Technology
RTAX2000DL-CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000DL-CQ352V ✓ सक्रियविशेषता तुलना
| पैरामीटर | RTAX2000DL-CQ352E | RTAX2000DL-CQ352V |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| System Gates | 2,000,000 | — |
| Configurable Logic Blocks (CLBs) | 19,712 | — |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-DSP (RTAX-S/SL and RTAX-DSP radiation-tolerant FPGAs) |
| Programmable Type | Antifuse (one-time programmable), live at power-up | — |
| पैकेज | CQFP-352 (Ceramic Quad Flat Pack) | CQFP-352, hermetically sealed ceramic, metal-sealed cofired |
| Package Dimensions | 48 mm x 48 mm | — |
| Terminal Pitch | 0.50 mm | 0.500 mm |
| Number of Terminals | 352 | — |
| User Input Terminals | 166 | — |
| User Output Terminals | 166 | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Up to 540 kbits SRAM with optional EDAC |
| Clock Features | Segmentable clocks, chip-wide highway routing | — |
| Technology | Digital CMOS | CMOS, antifuse (nonvolatile, one-time programmable) |
| Speed Grade | D (standard) | — |
| Application Domain | Space-flight systems (radiation tolerant) | — |
| ऑपरेटिंग तापमान | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| सप्लाई वोल्टेज | [DATA_NEEDED: core supply voltage] | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| Equivalent System Gates | — | 2,000,000 |
| Logic Cells | — | 29,568 |
| CLBs | — | 19,712 |
| Core Supply Voltage | — | 1.5 V nominal (1.425 V to 1.575 V) |
| DSP Mathblocks | — | Up to 120 (18-bit x 18-bit MAC, up to 125 MHz) |
| Maximum Combinatorial Delay | — | 1.100 ns |
| Total Ionizing Dose (TID) | — | 300 krad (functional); 200 krad (per family data) |
| Configuration | — | Live-at-power-up (antifuse, no external boot device) |