RTAX250SL-1CG624B vs RTAX250SL-CG624E तुलना
विस्तृत दोनों ओर की तुलना RTAX250SL-1CG624B द्वारा Microchip Technology और RTAX250SL-CG624E द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
RTAX250SL-1CG624B - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-1CG624B ✓ सक्रियMicrochip Technology
RTAX250SL-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-CG624E ✓ सक्रियविशेषता तुलना
| पैरामीटर | RTAX250SL-1CG624B | RTAX250SL-CG624E |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| Family | RTAX-SL (RTAX-S/SL RadTolerant FPGAs) | RTAX-S/SL Radiation-Tolerant FPGA |
| Equivalent System Gates | 250000 gates | — |
| Logic Cells (CLBs) | 2816 CLBs | 2816 |
| अधिकतम क्लॉक फ़्रीक्वेंसी | 649 MHz | — |
| CLB Combinatorial Delay (Max) | 0.930 ns | — |
| Process Technology | 0.15 um | 0.15 um CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| पैकेज | 624-Pin CCGA (Ceramic Column Grid Array) | 624-Pin CCGA (Ceramic Column Grid Array) |
| Speed Grade | -1 | — |
| Ordering Format | Box | — |
| Programming Technology | Antifuse (one-time programmable, live-at-power-up) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| ऑपरेटिंग तापमान | [DATA_NEEDED: Operating Temperature Range] | -55C to +125C |
| Maximum I/O Count | [DATA_NEEDED: I/O count for CG624 package] | — |
| Total Ionizing Dose (TID) Tolerance | [DATA_NEEDED: TID rating] | — |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| System Gates | — | 250000 |
| Maximum Frequency | — | 649 MHz |
| Supply Voltage Tolerance | — | +/-0.15 V |
| Maximum Combinatorial Delay | — | 0.93 ns |
| Logic Family | — | CMOS |
| Radiation Tolerance | — | SEU-hardened registers; SEU rate < 10-10 errors/bit-day |
| Clocking | — | Segmentable clocks, chip-wide highway routing |
| Programmability | — | Live at power-up, true single-chip |