RTAX250SL-1CG624B vs RTAX250SL-CG624E Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci RTAX250SL-1CG624B disebabkan oleh Microchip Technology dan RTAX250SL-CG624E disebabkan oleh Microchip Technology. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Microchip Technology
RTAX250SL-1CG624B RTAX250SL-1CG624B - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250SL-1CG624B - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250SL-1CG624B ✓ Aktif
Microchip Technology
RTAX250SL-CG624E RTAX250SL-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250SL-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250SL-CG624E ✓ Aktif

Pengandingan Spesifikasi

Parametr RTAX250SL-1CG624B RTAX250SL-CG624E
Merek Microchip Technology Microchip Technology
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Aktif
Family RTAX-SL (RTAX-S/SL RadTolerant FPGAs) RTAX-S/SL Radiation-Tolerant FPGA
Equivalent System Gates 250000 gates —
Logic Cells (CLBs) 2816 CLBs 2816
Frekuensi Klock Maksimum 649 MHz —
CLB Combinatorial Delay (Max) 0.930 ns —
Process Technology 0.15 um 0.15 um CMOS
Core Supply Voltage 1.5 V 1.5 V
Kemasan 624-Pin CCGA (Ceramic Column Grid Array) 624-Pin CCGA (Ceramic Column Grid Array)
Speed Grade -1 —
Ordering Format Box —
Programming Technology Antifuse (one-time programmable, live-at-power-up) —
Embedded Memory Embedded SRAM with built-in FIFO control logic Embedded SRAM with built-in FIFO control logic
Suhu Operasi [DATA_NEEDED: Operating Temperature Range] -55C to +125C
Maximum I/O Count [DATA_NEEDED: I/O count for CG624 package] —
Total Ionizing Dose (TID) Tolerance [DATA_NEEDED: TID rating] —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
System Gates — 250000
Maximum Frequency — 649 MHz
Supply Voltage Tolerance — +/-0.15 V
Maximum Combinatorial Delay — 0.93 ns
Logic Family — CMOS
Radiation Tolerance — SEU-hardened registers; SEU rate < 10-10 errors/bit-day
Clocking — Segmentable clocks, chip-wide highway routing
Programmability — Live at power-up, true single-chip

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