10AS048H1F34E1HG vs 10AS048H2F34E2LG Perbandingan
Perbandingan bersamaan detil 10AS048H1F34E1HG dari Altera dan 10AS048H2F34E2LG dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
10AS048H1F34E1HG - Arria 10 SX SoC FPGA, 480K LE, Dual A9, 1152-FBGA | Intel (Altera)
10AS048H1F34E1HG ✓ AktifIntel
10AS048H2F34E2LG - Arria 10 SX 480K SoC FPGA, Dual A9, 1152-FBGA | Intel
10AS048H2F34E2LG ✓ AktifPerbandingan Spesifikasi
| Parameter Umum | 10AS048H1F34E1HG | 10AS048H2F34E2LG |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Series | Arria 10 SX | — |
| Device Type | SoC FPGA (FPGA + ARM Cortex-A9 HPS) | — |
| Architecture | Hard Processor System (HPS) + Programmable Logic | — |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Logic Elements | 480K | 480000 |
| User I/O Count | 492 | — |
| Operating Frequency (HPS) | 1.5 GHz | — |
| Paket | 1152-FBGA, FC (35x35 mm) | 1152-ball FC-FBGA (F34), 35 x 35 mm |
| Process Technology | 20 nm | 20 nm |
| Temperature Grade | Industrial (E1) | — |
| Status RoHS | Compliant (HG suffix) | Compliant |
| Tipe Mounting | Surface Mount (flip-chip BGA) | Surface Mount (flip-chip BGA) |
| Memory Interfaces | DDR3 / DDR4 with hard controllers | — |
| Transceivers | Multi-gigabit (per H1 grade) | [DATA_NEEDED: number / data rate] |
| DSP Blocks | Variable-precision DSP (per Arria 10 family) | [DATA_NEEDED: variable-precision DSP block count] |
| Family | — | Arria 10 SX |
| Core Voltage | — | 0.9 V |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Maximum Frequency | — | 1.5 GHz |
| Operating Temperature Grade | — | Industrial / Medical (per OPN code H2) |
| Logic Family | — | Arria 10 SoC FPGA |
| Adaptive Logic Modules | — | [DATA_NEEDED: ALM count] |
| Embedded Memory (M20K) | — | [DATA_NEEDED: Mbits] |
| User I/O Banks | — | [DATA_NEEDED: bank count and total user I/O] |
| Level MSL | — | 3 (per FBGA package) |