5CSEBA2U19C8N vs 5CSEBA2U19C6N Perbandingan

Perbandingan bersamaan detil 5CSEBA2U19C8N dari Altera dan 5CSEBA2U19C6N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum 5CSEBA2U19C8N 5CSEBA2U19C6N
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Aktif
Family Cyclone V SE SoC FPGA Cyclone V SE SoC FPGA
Series 5CSEA2 —
Device Variant 5CSEBA2 (25K logic elements, dual ARM Cortex-A9) —
Core Architecture Dual ARM Cortex-A9 MPCore with CoreSight —
HPS Maximum Frequency 600 MHz —
FPGA Logic Elements 25,000 —
Embedded Memory (M10K) 1,400 Kb (typical for 25K LE variant) —
DSP Blocks Variable-precision DSP Variable-precision DSP
Process Technology 28 nm low-power TSMC 28 nm low-power
Core Supply Voltage 1.1 V —
Memory Controller Support DDR2, DDR3, LPDDR2 —
High-Speed Transceivers Present (Cyclone V SE family feature) —
PLLs Multiple (per Cyclone V SE device handbook) —
Paket 484-pin UBGА (19x19 mm) 484-pin UBGA (19x19 mm)
Tipe Mounting Surface Mount Surface Mount
Suhu Kerja 0C to +85C (commercial) —
Level MSL 3 (per JEDEC J-STD-020, assumed for 484-BGA) —
Status RoHS Compliant Compliant
Logic Elements — 25 K
Hard Processor System — Dual ARM Cortex-A9 MPCore with CoreSight
HPS Maximum Clock Frequency — 925 MHz
Operating Temperature Grade — Commercial (other)
Memory Interfaces — DDR2, DDR3, LPDDR2 with ECC
HPS Peripherals — GbE, USB 2.0 OTG, SATA, CAN, UART, SPI, I2C, SD/SDIO/MMC
L2 Cache — 512 KB shared
L1 Cache per Core — 32 KB I-cache + 32 KB D-cache
FPGA-to-HPS Bridges — AXI-32/AXI-64, FPGA-to-SDRAM ports

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