5M40ZM64C4N vs 5M40ZM64C4 Perbandingan
Perbandingan bersamaan detil 5M40ZM64C4N dari Altera dan 5M40ZM64C4 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | 5M40ZM64C4N | 5M40ZM64C4 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Family | MAX V | MAX V |
| Logic Elements | 40 | — |
| Macro Cells | 32 | — |
| Number of I/O Pins | 30 (max user I/O) | — |
| Number of Logic Array Blocks | 2 LABs (16 macrocells each) | — |
| Core Voltage VCCINT | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Voltage VCCIO | 1.2 V to 3.3 V (multi-voltage) | — |
| Maximum Internal Frequency | 184.1 MHz | — |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | — |
| Propagation Delay (max) | 7.5 ns | — |
| Suhu Kerja | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (Commercial, C4 speed grade) |
| Paket | 64-MBGA (Micro FineLine BGA), 4.5 x 4.5 mm | 64-ball MBGA (Micro BGA), 0.5 mm pitch |
| Tipe Mounting | Surface Mount (BGA) | — |
| Configuration Memory | Flash (non-volatile, instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Status RoHS | Compliant | Compliant |
| Level MSL | [DATA_NEEDED: MSL rating] | — |
| Logic Elements (LEs) | — | 40 |
| Macrocells | — | 32 |
| Logic Array Blocks (LABs) | — | 2 |
| Maximum User I/O Pins | — | 30 (52 device max) |
| Maximum Frequency (fMAX) | — | 184.1 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 7.5 ns |
| Core Voltage (VCCINT) | — | 1.8 V (internal) |
| I/O Voltage (VCCIO) | — | 1.2 V to 3.3 V |
| Embedded Memory (UFM) | — | 8 Kbits |
| Programming | — | JTAG (IEEE 1149.1), internal flash non-volatile |
| Lead-Free | — | Yes |