EP1M350F780I5 vs EP1M350F780C6N Perbandingan
Perbandingan bersamaan detil EP1M350F780I5 dari Altera dan EP1M350F780C6N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EP1M350F780I5 - Altera Mercury Enhanced Configuration Device, 780-pin FBGA | Intel
EP1M350F780I5 NrndIntel
EP1M350F780C6N - Mercury 350K FPGA, 486 I/O, 780-BGA | Intel (Altera)
EP1M350F780C6N ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EP1M350F780I5 | EP1M350F780C6N |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Waktu Pembelian Terakhir |
| Device Family | Altera Mercury (EP1M) Enhanced Configuration Device | — |
| Fungsi | FPGA configuration PROM with integrated controller | — |
| Storage Density Code | 350 (high-density) | — |
| Supported Configuration Schemes | Passive Serial, Active Serial, Fast Passive Parallel | — |
| Internal Architecture | Configuration controller + flash memory array | — |
| Programming Method | In-system programmable via Altera Quartus / JTAG | — |
| Paket | 780-ball FineLine BGA (F780) | 780-ball FC-FBGA (FINE LINE BGA-780) |
| Temperature Grade (suffix "I") | Industrial | — |
| Speed Grade | 5 | — |
| Target FPGA Compatibility | Altera APEX 20K, APEX II, Mercury, Stratix-class high-density FPGAs | — |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| Cascade / Multi-FPGA Support | Yes, supports daisy-chained multi-FPGA boot | — |
| Read-Back | Yes | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs_status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead_free] |
| Family | — | Mercury (EP1M350) |
| Device Type | — | Loadable Programmable Logic Device (PLD) / FPGA |
| Logic Family | — | CMOS, SRAM-based LUT |
| System Gates | — | 350,000 |
| Logic Cells / Elements | — | 14,400 |
| User I/Os | — | 486 |
| Integrated Transceivers | — | Yes, with CDR up to 1.25 Gbps |
| Core Supply Voltage | — | 1.8 V |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | S-PBGA-B780 |
| Suhu Kerja | — | 0 C to 85 C |
| Configuration Interface | — | JTAG (IEEE 1149.1) / passive serial |
| Level MSL | — | [DATA_NEEDED: msl_level] |
| Architecture | — | Look-up table (LUT)-based, optimized for high-speed serial I/O |
| Total Package Pins / Balls | — | 780 |