EP1S10B672C7N vs EP1S10F484C5N Perbandingan

Perbandingan bersamaan detil EP1S10B672C7N dari Intel dan EP1S10F484C5N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP1S10B672C7N EP1S10F484C5N
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Manufacturer Intel / Altera —
Product Family Stratix —
Logic Family CMOS —
Logic Elements/Cells 10570 cells —
Maximum Internal Clock 420.17 MHz —
Core Supply Voltage 1.5 V —
Technology Node 130 nm —
Package Code BGA —
Number of Terminals 672 —
Package Body Size 35 x 35 mm —
Ball Pitch 1.27 mm —
Package Shape Square —
Temperature Grade Commercial extended, 0 to 85 C —
Terminal Form Ball —
Configuration/JTAG JTAG boundary-scan per Stratix family data sheet —
Number of User I/O in 672-BGA [DATA_NEEDED: user I/O count] —
Total RAM Bits [DATA_NEEDED: total RAM bits] —
Embedded PLLs [DATA_NEEDED: PLL count] —
Config Device Compatibility [DATA_NEEDED: supported configuration devices] —
RoHS unknown - N suffix may indicate Pb-free, not verified in fetched data —
Series — Stratix
Family — Stratix (original)
Logic Elements (LEs) — 10,570
Logic Array Blocks (LABs) — 1,057
Embedded Memory Bits — 920,448
TriMatrix Memory Blocks — 14
Embedded DSP Blocks — 6 (≈48 9-bit multipliers)
PLLs — 4
Global Clock Networks — 12
Maximum User I/O — 335
User I/O Standard Support — LVDS, LVPECL, PCI-X, RapidIO, DDR
Process Technology — 0.13 µm CMOS
Core Voltage (VCCINT) — 1.5 V
Maximum Internal Frequency — 500 MHz (per Stratix datasheet)
Operating Temperature (TJ) — 0 °C to 85 °C (Commercial)
Paket — 484-ball FCBGA (F484), 23 x 23 mm, 1.0 mm pitch
Tipe Mounting — Surface Mount
Configuration Method — JTAG / Passive Serial / Active Serial
Device Status — Obsolete - last time buy completed
Design Toolchain — Quartus II (≤ v13.0)

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