EP1S20F672C7 vs EP1S20B672C7N Perbandingan
Perbandingan bersamaan detil EP1S20F672C7 dari Intel dan EP1S20B672C7N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP1S20F672C7 | EP1S20B672C7N |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Waktu Pembelian Terakhir | Obsolete |
| Series | Stratix | Stratix |
| Family | Altera Stratix FPGA | Stratix (original) |
| Logic Elements (LEs) | 18,460 | 18,460 |
| Embedded Memory Bits | 1,669,248 | 1,669,248 bits |
| User I/O Pins | 426 | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Paket | 672-ball FineLine BGA (35 x 35 mm, 1.27 mm pitch) | — |
| Logic Family | CMOS, SRAM-based | CMOS |
| Core Supply Voltage | 1.5 V | — |
| Suhu Kerja | 0C to 85C (commercial) | 0 °C to 85 °C (Commercial Extended) |
| Speed Grade | C7 | -7 |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel, Active Serial | — |
| Tipe Mounting | Surface Mount | Surface Mount (BGA) |
| Level MSL | [DATA_NEEDED: MSL level] | 3 (per JEDEC J-STD-020) |
| Status RoHS | unknown | [DATA_NEEDED: RoHS compliance] |
| Clock PLLs | Up to 10 | — |
| Process Technology | — | 0.13 µm CMOS |
| LABs / CLBs | — | 1,846 |
| Maximum User I/O | — | 426 |
| Number of Pins / Balls | — | 672 |
| Package Type | — | 672-BBGA (Fine-pitch BGA, 35 × 35 mm, 1.27 mm pitch) |
| Supply Voltage (Core, VCCINT) | — | 1.5 V |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |