EP1SGX40DF1020I7 vs EP1SGX40G Perbandingan
Perbandingan bersamaan detil EP1SGX40DF1020I7 dari Altera dan EP1SGX40G dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EP1SGX40DF1020I7 - 41,250 LEs Stratix GX FPGA, 1.5V FC-FBGA-1020 | Altera
EP1SGX40DF1020I7 ObsoletePerbandingan Spesifikasi
| Parameter Umum | EP1SGX40DF1020I7 | EP1SGX40G |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 41,250 | 41,250 |
| Configurable Logic Blocks (CLBs) | 4,125 | — |
| Process Technology | 130 nm CMOS | [DATA_NEEDED: process node] |
| Nominal Core Supply Voltage | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| Paket | 1020-ball FC-FBGA | 1020-pin FineLine BGA |
| Terminal Form | Ball | — |
| Package Shape | Square | — |
| Grading of Temperature | Military (I7 grade) | — |
| Technology | CMOS | — |
| Suhu Kerja | -40 °C to +100 °C (I7 grade per family datasheet) | — |
| Combinatorial CLB Delay | 9.48 ns (per family datasheet) | — |
| Tipe Mounting | Surface Mount | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Total RAM Bits | — | 3,423,744 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Maximum User I/O Pins | — | 624 |
| Number of Transceivers | — | 20 |
| Maximum Transceiver Data Rate | — | 3.1875 Gbps |
| Minimum Transceiver Data Rate | — | 500 Mbps |
| Transceiver Channels per Bank | — | 4 |
| Supported Serial Standards | — | PCI Express, XAUI, Serial RapidIO, SerialLite II |
| 8B/10B Encoder/Decoder | — | Hardware (dedicated per channel) |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Speed Grades Available | — | C5, C6, C7, I5, I6, I7 |
| Operating Temperature Range (Commercial) | — | 0C to +85C |
| Operating Temperature Range (Industrial) | — | -40C to +100C |
| Configuration Method | — | EPC enhanced configuration devices, JTAG |
| Vertical Migration | — | Supported within 1020-pin FineLine BGA package (EP1SGX25/EP1SGX40) |