EP20K1000CF33I8N vs EP20K1000CF33C9ES Perbandingan
Perbandingan bersamaan detil EP20K1000CF33I8N dari Altera dan EP20K1000CF33C9ES dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EP20K1000CF33C9ES - APEX-20KC FPGA 1M Gates 38400 LE 1020-FBGA
EP20K1000CF33C9ES ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EP20K1000CF33I8N | EP20K1000CF33C9ES |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Waktu Pembelian Terakhir |
| Family | APEX 20KC | APEX-20KC |
| Logic Elements | 38,400 cells | 38,400 |
| System Gates | 1,000,000 (approx.) | — |
| Maximum Internal Clock Frequency | 301.21 MHz | — |
| Propagation Delay | 1.79 ns | — |
| Number of Logic Elements / Cells | 38,400 | — |
| Process Technology | 0.15 µm CMOS | 0.18 um CMOS |
| Core Supply Voltage | 1.8 V nominal (1.71 V to 1.89 V) | — |
| Number of I/O Pins | 700 user I/O | — |
| Jumlah Pin | 1020 | — |
| Package Type | FC-FBGA-1020 (Flip-Chip Fine-pitch BGA) | — |
| Suhu Kerja | -40 °C to +85 °C (industrial) | 0 C to +85 C (commercial) |
| Embedded Memory | Dual-port RAM via ESB blocks | — |
| PLL Count | 4 | — |
| Configuration Interface | IEEE 1149.1 JTAG, EPC serial/parallel | — |
| Tipe Mounting | Surface Mount | — |
| Status RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance status] |
| Speed Grade | I8 | C9 |
| Manufacturer | — | Intel (formerly Altera) |
| Typical Gate Count | — | 1,000,000 system gates |
| Logic Array Blocks (LABs) | — | 3,840 |
| Embedded System Blocks (ESBs) | — | 212 |
| Total Embedded RAM Bits | — | 327,680 bits |
| Maximum User I/O Pins | — | 708 |
| Paket | — | 1,020-ball FineLine BGA (FBGA) |
| Logic Element Architecture | — | 4-input LUT with dedicated carry chain |
| Maximum Embedded RAM per ESB | — | 32,768 bits (dual-port, FIFO support) |
| Phase-Locked Loops | — | Up to 4 enhanced PLLs |
| MultiVolt I/O Support | — | 1.8V / 2.5V / 3.3V / 5.0V |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Configuration Method | — | Passive serial / Passive parallel / JTAG |
| Lead-Free | — | [DATA_NEEDED: lead-free finish status] |