EP20K600CF672C6 vs EP20K600CF672C7N Perbandingan
Perbandingan bersamaan detil EP20K600CF672C6 dari Altera dan EP20K600CF672C7N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP20K600CF672C6 | EP20K600CF672C7N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | APEX 20KC | — |
| Typical Gate Count | 600,000 gates | — |
| Logic Elements (LEs) | 24,320 | — |
| Embedded System Blocks (ESBs) | 160 (each 2,048 bits) | — |
| Maximum Embedded RAM | 311,296 bits (311 kbit) | — |
| Maximum User I/O Pins | 508 | 488 |
| Paket | 672-ball FineLine BGA (CF672) | FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch |
| Package Body Size | 27 mm × 27 mm | — |
| Speed Grade | -6 (C6) | C7 |
| Suhu Kerja | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (Commercial) |
| Core Voltage | 1.8 V | 1.8 V |
| I/O Standards Supported | LVCMOS, LVTTL, HSTL, SSTL, GTL+ | — |
| Embedded PLLs | 4 | — |
| Process Technology | 0.18 µm CMOS, 6 metal layers | 0.15 µm all-layer copper-metal CMOS |
| Configuration Method | SRAM-based, JTAG, EPC16/EPC2 | — |
| Status RoHS | Non-RoHS (legacy process) | unknown |
| Device Family | — | APEX 20KC |
| Maximum System Gates | — | 1,052,000 |
| Typical Gates | — | 600,000 |
| Logic Elements / Cells | — | 24,320 |
| Total Package Pins | — | 652 |
| Maximum Operating Frequency | — | 375.94 MHz |
| Propagation Delay | — | 1.48 ns |
| Architecture | — | MultiCore (LUT + Embedded System Memory) |
| Seated Height | — | 3.50 mm |
| Tipe Mounting | — | Surface Mount (BGA) |