EP20K600CF672I8ES vs EP20K600CF672C8N Perbandingan
Perbandingan bersamaan detil EP20K600CF672I8ES dari Intel dan EP20K600CF672C8N dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Intel
EP20K600CF672I8ES - APEX 20KC 600K Gates FPGA, 672-FBGA | Intel
EP20K600CF672I8ES ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EP20K600CF672I8ES | EP20K600CF672C8N |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Waktu Pembelian Terakhir | Aktif |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 24,320 | — |
| Typical Gates | 600,000 | — |
| Maximum User I/O | 508 | — |
| Embedded Memory Bits | 311,296 | — |
| Process Technology | 0.18 µm CMOS (0.15 µm base) | — |
| Core Supply Voltage | 1.8 V | — |
| Maximum Internal Frequency | 301.21 MHz | — |
| PLLs (Phase-Locked Loops) | 4 | — |
| Configuration Scheme | FPP / PS | — |
| Paket | 672-ball FC-FBGA (FineLine) | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Suhu Kerja | -40 °C to +85 °C (Industrial, I-grade) | 0°C to 85°C |
| Speed Grade | 8 | — |
| Tipe Mounting | Surface Mount | Surface mount |
| Status RoHS | [DATA_NEEDED: RoHS compliance] | unknown |
| Tipe Memori | SRAM-based (volatile, requires configuration) | — |
| Device Type | — | SPLD |
| Product Type | — | FPGA / programmable logic device |
| Nominal Gate Capacity | — | 600K gates |
| Logic Elements or Cells | — | 24,320 |
| Macros | — | 2,432 |
| User I/O Count | — | 508 |
| Package Terminals | — | 652 pins |
| Package Description | — | 672-pin FC-FBGA |
| Tegangan Pemuat | — | 1.8 V |
| Listed Frequency | — | 301.21 MHz |
| Propagation Delay | — | 1.48 ns |
| Fabrication Process | — | 0.15 µm |
| Interconnect Metal | — | All-layer copper metal |
| I/O Configuration | — | 508 user I/O |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |
| Configuration Method | — | [DATA_NEEDED: configuration memory and programming method] |
| Core Current | — | [DATA_NEEDED: core supply current] |
| I/O Bank Voltage | — | [DATA_NEEDED: supported I/O voltage range] |
| Junction Temperature | — | [DATA_NEEDED: maximum junction temperature] |
| Tahanan Panas | — | [DATA_NEEDED: junction-to-ambient thermal resistance] |