EP2A40F672C8N vs EP2A40F672C9 Perbandingan
Perbandingan bersamaan detil EP2A40F672C8N dari Intel dan EP2A40F672C9 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EP2A40F672C9 - APEX II FPGA 1.5M Gates 38400 Cells 672-BGA | Altera
EP2A40F672C9 ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EP2A40F672C8N | EP2A40F672C9 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Waktu Pembelian Terakhir |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Logic Family | CMOS | CMOS |
| System Gates | 1.5 M | 1.5 M |
| Logic Elements / Cells | 38,400 | 38,400 |
| Maximum Operating Frequency | 376 MHz | — |
| Propagation Delay | 1.55 ns | 1.55 ns |
| Technology Node | 0.15 µm | — |
| Process Feature | All-layer copper, up to 8 metal layers | — |
| Nominal Supply Voltage (VCCINT) | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| User I/Os | 492 | 492 |
| Number of Pins / Balls | 672 | — |
| Package Type | FC-FBGA (FineLine BGA) | — |
| Package Dimensions | 27 x 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| LVDS Data Rate | 1 Gbps | — |
| Embedded PLLs | 4 | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Operating Temperature (Commercial) | 0 °C to 85 °C | — |
| Speed Grade | C8 | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Device Family | — | APEX II PLD |
| Macros | — | 2,560 |
| Jumlah Pin | — | 672 |
| Paket | — | 672-BBGA, FC-FBGA (FineLine) |
| Package Size | — | 27 mm × 27 mm, 1 mm ball pitch |
| Core Voltage | — | 1.5 V |
| Process Technology | — | 0.15 µm all-layer copper, up to 8 metal layers |
| Internal Speed Grade | — | 366 MHz |
| Suhu Kerja | — | 0 °C to 85 °C (commercial) |
| I/O Standards Supported | — | True-LVDS, LVPECL, PCML, HyperTransport |
| Tipe Mounting | — | Surface Mount |