EP2A70B724I7 vs EP2A70B724C7N Perbandingan
Perbandingan bersamaan detil EP2A70B724I7 dari Intel dan EP2A70B724C7N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Intel
EP2A70B724I7 - APEX II FPGA 3M Gates 67200 Cells 420MHz 1.5V 724-FCBGA | Intel
EP2A70B724I7 ObsoletePerbandingan Spesifikasi
| Parameter Umum | EP2A70B724I7 | EP2A70B724C7N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | APEX II | APEX II (EP2A70) |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 67200 | — |
| Maximum System Gates | 3 M | — |
| Embedded Memory | [DATA_NEEDED: ESB bits - 429 Kb or similar] | Embedded System Blocks (ESBs) - dual-port RAM / ROM / CAM |
| Maximum User I/O Pins | approximately 422 (724-pin FCBGA) | — |
| Process Technology | 0.15 um CMOS | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltages Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| PLL Blocks | 4 | — |
| True-LVDS Channels | 8 | — |
| Maximum Internal Frequency | 420 MHz | 420 MHz |
| Paket | 724-pin FCBGA (FineLine BGA) | 724-pin FCBGA (Flip-Chip BGA) |
| Operating Temperature Grade | Industrial (-40 C to +100 C case) | — |
| Configuration Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | — |
| Status RoHS | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: RoHS status] |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Technology | — | 0.15 µm CMOS |
| System Gates | — | 3,000,000 |
| Logic Cells / Logic Elements | — | 67,200 |
| Propagation Delay (typ.) | — | 2.17 ns |
| User I/O Pins | — | 536 |
| Macrocells (memory blocks reference) | — | 16 |
| Core Supply Voltage | — | 1.5 V nominal |
| I/O Supply Voltage | — | MultiVolt (1.5V / 1.8V / 2.5V / 3.3V / 5V tolerant) |
| Suhu Kerja | — | 0 °C to +85 °C (Commercial) |
| Ball Pitch | — | 1.27 mm |
| Seated Height | — | 3.5 mm |
| Tipe Mounting | — | Surface Mount |
| Configuration Method | — | JTAG, Passive Serial (PS), Fast Passive Parallel (FPP) |
| PLL Count | — | [DATA_NEEDED: PLL count] |