EP2A70B724I7 vs EP2A70B724C7N 比較

詳細並排比較 EP2A70B724I7 由 Intel 與 EP2A70B724C7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A70B724I7 EP2A70B724C7N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family APEX II APEX II (EP2A70)
Manufacturer Intel (formerly Altera) —
Logic Elements 67200 —
Maximum System Gates 3 M —
Embedded Memory [DATA_NEEDED: ESB bits - 429 Kb or similar] Embedded System Blocks (ESBs) - dual-port RAM / ROM / CAM
Maximum User I/O Pins approximately 422 (724-pin FCBGA) —
Process Technology 0.15 um CMOS —
Core Voltage (VCCINT) 1.5 V —
I/O Voltages Supported 1.5 V, 1.8 V, 2.5 V, 3.3 V —
PLL Blocks 4 —
True-LVDS Channels 8 —
Maximum Internal Frequency 420 MHz 420 MHz
封裝 724-pin FCBGA (FineLine BGA) 724-pin FCBGA (Flip-Chip BGA)
Operating Temperature Grade Industrial (-40 C to +100 C case) —
Configuration Interface JTAG (IEEE 1149.1) / IEEE 1532 ISP —
RoHS 狀態 [DATA_NEEDED: not stated in provided data] [DATA_NEEDED: RoHS status]
Device Type — FPGA (Field Programmable Gate Array)
Technology — 0.15 µm CMOS
System Gates — 3,000,000
Logic Cells / Logic Elements — 67,200
Propagation Delay (typ.) — 2.17 ns
User I/O Pins — 536
Macrocells (memory blocks reference) — 16
Core Supply Voltage — 1.5 V nominal
I/O Supply Voltage — MultiVolt (1.5V / 1.8V / 2.5V / 3.3V / 5V tolerant)
工作溫度 — 0 °C to +85 °C (Commercial)
Ball Pitch — 1.27 mm
Seated Height — 3.5 mm
安裝類型 — Surface Mount
Configuration Method — JTAG, Passive Serial (PS), Fast Passive Parallel (FPP)
PLL Count — [DATA_NEEDED: PLL count]

資料表與資源

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