EP4CE6F17C8N vs EP4CE6F17C7N Perbandingan
Perbandingan bersamaan detil EP4CE6F17C8N dari Altera dan EP4CE6F17C7N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP4CE6F17C8N | EP4CE6F17C7N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Manufacturer | Altera (Intel) | Altera / Intel |
| Series | Cyclone IV E | Cyclone IV E |
| Device Family | Cyclone IV E (EP4CE6) | — |
| Logic Elements | 6,272 LE | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Embedded Memory | 270 Kbits | — |
| Embedded 18x18 Multipliers | 15 | — |
| Maximum User I/Os | 179 | — |
| PLLs | 2 | — |
| Global Clock Networks | [DATA_NEEDED: clock network count] | — |
| Core Voltage | 1.2 V | — |
| Process Technology | 60 nm low-power | 60 nm |
| Paket | 256-ball FBGA (F17, 17x17 mm) | — |
| Tipe Mounting | Surface Mount | Surface Mount |
| Suhu Kerja | 0C to +85C (Commercial) | — |
| Speed Grade | C8 | — |
| Configuration Modes | JTAG, AS, PS, FPP | — |
| Status RoHS | Compliant | — |
| Level MSL | [DATA_NEEDED: MSL level] | — |
| Product Category | — | FPGA - Field Programmable Gate Array |
| Number of Logic Elements / Cells | — | 6272 |
| Number of CLBs / LABs | — | 392 |
| Total RAM Bits | — | 276480 bits |
| Number of User I/O | — | 179 |
| Paket / Case | — | 256-LBGA (FBGA-256) |
| Package Body Size | — | 17 mm x 17 mm |
| Ball Pitch | — | 1 mm |
| Core Supply Voltage | — | 1.2 V |
| Maximum Internal Clock Frequency | — | 472.5 MHz |
| Lead-Free Finish | — | Yes (N suffix) |
| Number of Terminations | — | 256 |
| RoHS Compliance | — | Compliant |
| Status Lingkungan Hidup | — | Active production |
| Operating Temperature Grade | — | [DATA_NEEDED: exact C-grade junction/ambient temperature range from Cyclone IV datasheet] |
| On-Chip PLL Count | — | [DATA_NEEDED: number of PLLs] |