EPC16QC100-TAAC80 vs EPC16QC100N Perbandingan

Perbandingan bersamaan detil EPC16QC100-TAAC80 dari Altera dan EPC16QC100N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC16QC100-TAAC80 EPC16QC100N
Merek Altera Altera
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup Obsolete Obsolete
Tipe Memori Flash (non-volatile configuration) —
Memory Density 16 Mbit —
Configuration Modes FPP, PS, AS, JTAG —
Data Compression Yes (built-in, 30-55% file size reduction) —
Supply Voltage (VCC) 3.3 V 3.0 V to 3.6 V
I/O Voltage Tolerance 1.8 V / 2.5 V / 3.3 V / 5 V —
Supported FPGA Families Stratix, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
JTAG Support IEEE 1149.1 boundary scan, in-system programmable —
Paket 100-pin PQFP (Plastic Quad Flat Pack), 20x14 mm 100-pin PQFP (20 x 14 mm)
Package Code QC100 —
Packaging Style Tape and Reel (TAAC80 suffix) —
Suhu Kerja -40C to +85C (industrial) 0 C to 70 C
Configuration Controller Internal (integrated with flash array) —
Jumlah Pin 100 —
Tipe Mounting Surface Mount Surface Mount
Ukuran Memori — 16 Mbit (16,777,216 bits)
Programmable Type — In System Programmable
Configuration Clock Frequency — 33 MHz max
On-Chip Decompression — Yes (supports compressed bitstreams)
Access Time — 90 ns typical
Flash Read Bandwidth — 160 Mbps (16-bit DQ at 10 MHz)
Configuration Interface — FPP / PS / AS via dedicated FPGA pins
JTAG (IEEE 1149.1) ISP — Supported
Lead Free — Yes (per datasheet)
Packaging — Tray

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