EPC20LI20N vs EPC2LI20 Perbandingan
Perbandingan bersamaan detil EPC20LI20N dari Intel dan EPC2LI20 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPC20LI20N | EPC2LI20 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | Memory ICs |
| Status Lingkungan Hidup | NRND | NRND |
| Tipe Memori | EPROM (UV-erasable, in-system programmable) | Flash (in-system programmable) |
| Ukuran Memori | 1.6 Mbit (65,536 x 1-bit words, approx. 200 Kbyte) | 1.6 Mb (1,572,864 bits) |
| Antarmuka | Serial (4-pin Altera Passive Serial: DCLK, DATA0, nCONFIG, nSTATUS) | — |
| Tegangan Pemuat | 3.3 V (5.0 V compatible variant in same family) | — |
| Configuration Clock | Up to 10 MHz | — |
| Target FPGA Families | APEX II, APEX 20K/KC/KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA | — |
| Paket | 20-pin PLCC (9x9 mm, JEDEC MS-018) | — |
| Tipe Mounting | Surface Mount (PLCC socket or direct solder) | Surface Mount (PLCC socket-compatible) |
| Programming Interface | IEEE 1532 / JTAG (in-system) | — |
| Suhu Kerja | -40C to +85C (industrial) | -40 C to +85 C (Industrial) |
| Standby Current | [DATA_NEEDED: standby current uA] | — |
| Active Configuration Current | [DATA_NEEDED: ICC active mA] | — |
| Programming Voltage | [DATA_NEEDED: VPP] | — |
| Programming Cycles | [DATA_NEEDED: endurance cycles] | — |
| Level MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free status] | — |
| Multi-Device Daisy-Chain | Supported via nCASC pin | — |
| Programmable Type | — | In System Programmable (ISP) |
| Fungsi | — | Configuration PROM for SRAM-based FPGAs |
| Supply Voltage - Operating | — | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) |
| Paket / Case | — | 20-PLCC (J-lead, 9x9 mm) |
| Configuration Interface | — | Serial or Byte-wide (parallel) |
| Decompression | — | On-chip (supports compressed bitstreams) |
| JTAG / ISP Interface | — | IEEE 1532 (TCK, TMS, TDI, TDO) |
| Multi-Device Support | — | Yes (daisy-chain configuration) |
| User-Accessible Memory | — | Yes (unused flash available to user logic) |
| Status RoHS | — | [DATA_NEEDED: RoHS status] |