EPC2LC20NU vs EPC2LC20ES Perbandingan

Perbandingan bersamaan detil EPC2LC20NU dari Altera dan EPC2LC20ES dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC2LC20NU EPC2LC20ES
Merek Altera Intel
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup Obsolete Aktif
Fungsi In-System Programmable Configuration PROM —
Memory Density 1.6 Mbit —
FPGA Interface Altera serial (4-pin: nCS, DCLK, DATA, nINIT_CONF) —
Supply Voltage (VCC) 3.0 V to 3.6 V —
I/O Tolerance 5 V tolerant inputs (per datasheet, except JTAG pins) —
Programming Method In-system via IEEE 1149.1 JTAG —
JTAG Support Yes (IEEE Std 1149.1 boundary-scan compliant) —
Cascade Support Yes - daisy-chain for larger bitstreams —
Minimum DC Input -0.3 V (inputs may undershoot to -2.0 V for <20 ns) —
Maximum Overshoot 7.0 V for <100 mA and <20 ns —
Paket 20-pin J-lead PLCC (9x9 mm) 20-PLCC (J-lead, 9x9 mm)
Tipe Mounting Surface Mount Surface Mount / Through-Hole (PLCC socket)
Lead-Free / RoHS Non-LEAD / non-RoHS (NU suffix = matte tin Sn finish, not Pb-free) —
Suhu Kerja 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
Compatibility Altera APEX 20K, APEX II, Mercury, FLEX 10K, ACEX 1K, Cyclone (legacy serial configuration) —
Tipe Memori — Configuration PROM (Non-volatile)
Ukuran Memori — 1.6 Mbit
Target Device — SRAM-based FPGAs and LUT devices
Antarmuka — Serial (DCLK/DATA) with JTAG ISP
Operating Voltage — 3.3 V and 5.0 V tolerant
JTAG Standard — IEEE Std. 1149.1 compliant
In-System Programmability — Yes (via built-in JTAG)
Boundary-Scan Test (BST) — Built-in, IEEE 1149.1 compliant
Configuration Modes — Serial and parallel supported
Jumlah Pin — 20
Status RoHS — Compliant (ES suffix denotes lead-free industrial)
Programming Interface — JTAG (4-wire: TDI/TDO/TMS/TCK)
Manufacturer — Intel (formerly Altera)

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