EPC2LI20 vs EPC2LC20-T Perbandingan
Perbandingan bersamaan detil EPC2LI20 dari Altera dan EPC2LC20-T dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPC2LI20 | EPC2LC20-T |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | Memory ICs | Memory ICs |
| Status Lingkungan Hidup | NRND | Waktu Pembelian Terakhir |
| Ukuran Memori | 1.6 Mb (1,572,864 bits) | 1.6 Mb |
| Tipe Memori | Flash (in-system programmable) | Configuration PROM (Flash) |
| Programmable Type | In System Programmable (ISP) | — |
| Fungsi | Configuration PROM for SRAM-based FPGAs | — |
| Supply Voltage - Operating | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) | — |
| Suhu Kerja | -40 C to +85 C (Industrial) | -40C to +85C (industrial) |
| Paket / Case | 20-PLCC (J-lead, 9x9 mm) | — |
| Tipe Mounting | Surface Mount (PLCC socket-compatible) | Surface Mount |
| Configuration Interface | Serial or Byte-wide (parallel) | — |
| Decompression | On-chip (supports compressed bitstreams) | — |
| JTAG / ISP Interface | IEEE 1532 (TCK, TMS, TDI, TDO) | — |
| Multi-Device Support | Yes (daisy-chain configuration) | — |
| User-Accessible Memory | Yes (unused flash available to user logic) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Level MSL | [DATA_NEEDED: MSL level] | — |
| Configuration Mode | — | Serial (PS mode), cascadable |
| Max Configuration Frequency | — | 10 MHz |
| Tegangan Pemuat | — | 3.3 V (typical) |
| Programmability | — | In-System Programmable via JTAG |
| JTAG Interface | — | IEEE Std 1149.1-1990 compliant |
| Supported FPGA Families | — | ACEX, APEX, Cyclone, FLEX, MAX 7000A/B, MAX II, Mercury |
| Cascade Support | — | Yes (nCASC pin) |
| Paket | — | 20-PLCC (9x9 mm) |
| Packaging Suffix | — | -T = Tape and Reel |
| Lead-Free | — | Yes |