EPC2TC32N vs EPC2TC32U Perbandingan

Perbandingan bersamaan detil EPC2TC32N dari Altera dan EPC2TC32U dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC2TC32N EPC2TC32U
Merek Altera Altera
Kategori Memory ICs FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Manufacturer Altera (now Intel) —
Tipe Memori Flash Configuration PROM —
Ukuran Memori 1.6 Mbit 1.6 Mbit
Programmable Type In System Programmable (ISP) —
Antarmuka JTAG (IEEE 1149.1) + serial/parallel —
Supply Voltage - VCCINT 3.0 V to 3.6 V or 4.75 V to 5.25 V —
Supply Voltage - VCCIO 3.0 V to 3.6 V or 4.75 V to 5.25 V —
Max Configuration Clock 8 MHz —
Paket 32-TQFP (7x7 mm) 32-pin QFP (CAF48, lead-free)
Suhu Kerja 0 °C to +70 °C (Commercial) -40 C to +85 C
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX Altera Stratix, Cyclone, APEX, ACEX, Mercury, Excalibur
Daisy-Chain Support Yes (multi-FPGA cascade) —
JTAG Compliance IEEE 1149.1 —
Tipe Mounting Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: RoHS compliance status] Compliant (lead-free / RoHS per distributor data)
Configuration Mode Serial (AS) or Parallel (PS/AP) Passive Serial (PS), JTAG
Fungsi — Serial Configuration Device for SRAM-based LUT FPGAs
Configuration Interface — Altera Passive Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
JTAG Support — Yes (IEEE 1149.1 boundary-scan, ISP)
Tegangan Pemuat — 3.0 V to 3.6 V or 4.75 V to 5.25 V
Level MSL — [DATA_NEEDED: MSL level]
Lead-Free Finish — Yes (U suffix)
Configuration Time — [DATA_NEEDED: typical configuration time]
Programming Cycles — [DATA_NEEDED: minimum program/erase cycles]
Data Retention — [DATA_NEEDED: minimum data retention years]

Spek dan Sumber

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