EPC2TC32N vs EPC2TC32U 对比

详细并排对比 EPC2TC32N 出自 Altera 和 EPC2TC32U 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2TC32N EPC2TC32U
品牌 Altera Altera
分类 Memory ICs FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.20 $5.85
Manufacturer Altera (now Intel) —
存储器类型 Flash Configuration PROM —
存储容量 1.6 Mbit 1.6 Mbit
Programmable Type In System Programmable (ISP) —
接口 JTAG (IEEE 1149.1) + serial/parallel —
Supply Voltage - VCCINT 3.0 V to 3.6 V or 4.75 V to 5.25 V —
Supply Voltage - VCCIO 3.0 V to 3.6 V or 4.75 V to 5.25 V —
Max Configuration Clock 8 MHz —
封装 32-TQFP (7x7 mm) 32-pin QFP (CAF48, lead-free)
工作温度 0 °C to +70 °C (Commercial) -40 C to +85 C
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX Altera Stratix, Cyclone, APEX, ACEX, Mercury, Excalibur
Daisy-Chain Support Yes (multi-FPGA cascade) —
JTAG Compliance IEEE 1149.1 —
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS compliance status] Compliant (lead-free / RoHS per distributor data)
Configuration Mode Serial (AS) or Parallel (PS/AP) Passive Serial (PS), JTAG
功能 — Serial Configuration Device for SRAM-based LUT FPGAs
Configuration Interface — Altera Passive Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
JTAG Support — Yes (IEEE 1149.1 boundary-scan, ISP)
电源电压 — 3.0 V to 3.6 V or 4.75 V to 5.25 V
MSL 等级 — [DATA_NEEDED: MSL level]
Lead-Free Finish — Yes (U suffix)
Configuration Time — [DATA_NEEDED: typical configuration time]
Programming Cycles — [DATA_NEEDED: minimum program/erase cycles]
Data Retention — [DATA_NEEDED: minimum data retention years]

数据手册与资源

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