EPM240F100C5N vs EPM240F100I5 Perbandingan
Perbandingan bersamaan detil EPM240F100C5N dari Intel dan EPM240F100I5 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM240F100C5N | EPM240F100I5 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Device Family | MAX II | — |
| Logic Elements (LEs) | 240 | 240 |
| Macrocells | 192 | 192 |
| User I/O Pins (maximum) | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Operating Frequency | [DATA_NEEDED: fmax per datasheet] | — |
| Global Clock Networks | [DATA_NEEDED: count] | — |
| Paket | 100-ball FineLine BGA (FBGA-100) | 100-ball FineLine BGA (FBGA-100), 10x10 mm, 1.0 mm pitch |
| Rentang Suhu Kerja | 0C to +85C (commercial) | -40 °C to +100 °C (industrial, I5 grade) |
| Supply Voltage Core (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) | — |
| Configuration Memory | Non-volatile flash (instant-on) | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Programming Interface | JTAG / ByteBlasterMV | JTAG (IEEE 1149.1), enhanced ISP |
| Tipe Mounting | Surface Mount (BGA) | Surface Mount (SMD/SMT) |
| Status RoHS | Compliant | Compliant |
| Series | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| User I/O Count | — | 80 |
| Pin-to-Pin Logic Delay | — | 4.7 ns |
| User Flash Memory (UFM) | — | 8 Kbit |
| Process Technology | — | 0.18 µm 6-layer-metal flash |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Architecture | — | Non-volatile, instant-on, flash-based |
| Supply Voltage - Core | — | 3.0 V to 3.6 V (typical 3.3 V) |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Lead-Free | — | Yes |
| Level MSL | — | 3 (168 hours) |